IC Modeling via Machine Learning Regressions - A Data-Driven Approach to SPICE Integration - Research Summary

Aug 4, 2026

The paper presents a method to generate accurate and efficient macromodels for high-speed I/O buffers, improving modular and scalable model generation through machine learning. To address limitations of traditional approaches, kernel regression is used to build SPICE-compliant models. Two term-reduction compression strategies—random selection and Nyström approximation—are compared to enhance compactness. Effectiveness is validated on real devices with signal and power integrity co-simulations, emphasizing accuracy and simulation efficiency.

LanguageEnglish

CategoryResearch & Report

FormatPDF

Pages10

Reading Time25 min

AccessFree to download

Abstract and Index Terms

Introduction

Challenges in High-Performance System Evaluation

Limits of Transistor-Level and Conventional Black-Box Models

Behavioral Modeling and IBIS Background

System Identification and Machine Learning Trends

Kernel Regression and Compact SPICE-Compliant Macromodels

POLITECNICO DI TORINO Repository ISTITUZIONALE IC Modeling via Machine Learning Regressions: A Data-Driven Approach to SPICE Integration Original IC Modeling via Machine Learning Regressions: A Data-Driven Approach to SPICE Integration / Atlante, Marco; Trinchero, Riccardo; Stievano, Igor S. ; Telescu, Mihai; Tanguy, Noël. -In: IEEE TRANSACTIONS ON COMPONENTS, PACKAGING AND MANUFACTURING TECHNOLOGY. PART C. MANUFACTURING. -ISSN 1083-4400. -ELETTRONICO. -15:9(2025), pp. 1814-1822. [10 . 1109/TCPMT.2025.3584470] Availability: This version is available at: 11583/3003138 since: 2025-09-18T12:52:12Z Publisher: IEEE Published DOI:10.1109/TCPMT.2025.3584470 Terms of use: This article is made available under terms and conditions as specified in the corresponding bibliographic description in the repository Publisher copyright IEEE postprint/Author's Accepted Manuscript ©2025 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collecting works, for resale or lists, or reuse of any copyrighted component of this work in other works. (Article begins on next page) 04 October 2025 IC Modeling via Machine Learning Regressions: a Data-Driven Approach to SPICE Integration M. Atlante , Student Member, IEEE, R. Trinchero , Member, IEEE, I. S. Stievano , Senior Member, IEEE, M. Telescu , Member, IEEE, N. Tanguy Abstract—This paper presents a method for generating accurate and efficient macromodels of high-speed I/O buffers. Extending existing techniques, the proposed approach enables a modular and scalable model generation tool based on machinelearning. Given the limitations of traditional methods, this work leverages kernel regression to develop SPICE-compliant models. Two compression schemes, random selection and Nystrm approximation are used and thoroughly compared to reduce the number of expansion terms, with beneficial effects in terms of compactness of the SPICE implementation. The effectiveness of the method in terms of model accuracy and efficiency is stressed through real devices and typical signal and power integrity cosimulations. Index Terms—Digital integrated circuits, buffer modeling, signal and power integrity, high-speed interconnects, machine learning, kernel regression. I. INTRODUCTION THE design of modern high-performance electronic sys tems is increasingly challenged by stringent performance and technological constraints, which demand more complex evaluations to ensure system reliability. Engineers must conduct comprehensive Signal and Power Integrity (SIPI) and Electromagnetic Compatibility (EMC) assessments to mitigate critical issues such as crosstalk, simultaneous switching noise, immunity, and radiation. Advanced simulation techniques are increasingly necessary to predict power bouncing and signal propagation across interconnects, considering complex geometries and nonlinear device behavior. In this framework, traditional transistor-level models based on internal physical descriptions of devices offer high accuracy, but are impractical due to their potential complexity and the resulting CPU time demand. Additionally, they risk disclosing proprietary device information or encrypted features specific to a particular SPICE solver. On the other hand, blackbox models, such as behavioral models or macromodels, offera promising and efficient alternative to transistor-level models [1] . Behavioral models infer mathematical relationships from observable responses at device ports or assume simplified circuital equivalents [2]–[11] . The most well-known example of behavioral modeling using equivalent circuits is the Input/Output Buffer Information M. Atlante, R. Trinchero, and I. S. Stievano are with the EMC Group, Department of Electronics and Telecommunications, Politecnico di Torino, 10129

FAQs

What problem does the paper address in IC buffer modeling?

It targets the need for accurate yet efficient macromodels of high-speed I/O buffers, where traditional transistor-level models are too complex and computationally expensive.

How does the proposed method ensure SPICE compatibility?

It uses kernel regression to develop models that conform to SPICE requirements, enabling integration into standard simulation tools.

Which compression techniques are compared, and why?

Random selection and Nyström approximation are compared to reduce the number of expansion terms, improving the compactness of the resulting SPICE implementation.

Aug 4, 2026

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