TDA837x family - I2C-bus controlled economy PAL/NTSC and NTSC TV-processors

Oct 12, 2026

TDA837x family TV processors are I2C-bus controlled single-chip solutions designed for PAL/NTSC (TDA8374, TDA8375) and NTSC (TDA8373, TDA8377) television receivers. The datasheet outlines key functional features including an IF vision amplifier, PLL demodulator, alignment-free sound and horizontal oscillation, chrominance trap and band-pass filters with auto-calibration, and integrated luminance timing. It compares economy versus mid/high-end versions, lists version-specific circuit differences in tables, and provides quick-reference electrical data such as supply, input sensitivities, and output signal levels, plus ordering/package information.

LanguageEnglish

CategoryTechnology

FormatPDF

Pages73

Reading Time3 h 4 min

AccessFree to download

Features

General description

TV receiver versions (Table 1)

Differences between IC versions (Table 2)

Quick reference data

Ordering information

INTEGRATED CIRCUITS DATA SHEET TDA837x family I2 C-bus controlled economy PAL/NTSC and NTSC TV-processors Preliminary speciﬁcation 1997 Jul 01 File under Integrated Circuits, IC02 I2C-bus controlled economy PAL/NTSC and NTSC TV-processors TDA837x family FEATURES Available in all ICs: • Vision IF amplifier with high sensitivity and good figures for differential phase and gain • PLL demodulator for the IF signal • Alignment-free sound demodulator • Flexible source selection with a CVBS input for the internal signal and Y/C or CVBS input for the external signal • Audio switch • The output signal of the CVBS (Y/C) switch is externally available • Integrated chrominance trap and band-pass filters (auto-calibrated) • Luminance delay line integrated • A symmetrical peaking circuit in the luminance channel • Black stretching of non-standard CVBS or luminance signals • RGB control circuit with black current stabilization and white point adjustment • Linear RGB inputs and fast blanking • Horizontal synchronization with two control loops and alignment-free horizontal oscillator • Slow start and slow stop of the horizontal drive pulses • Vertical count-down circuit • Vertical driver optimized for DC-coupled vertical output stages • I2C-bus control of various functions • Low dissipation • Small amount of peripheral components compared with competition ICs. GENERAL DESCRIPTION The various versions of the TDA837x series are I2C-bus controlled single-chip TV processors which are intended tobe applied in PAL/NTSC (TDA8374 and TDA8375) and NTSC (TDA8373 and TDA8377) television receivers. All ICs are available in an SDIP56 package and some versions are also available in a QFP64 package. The ICs are pin compatible so that with one application board NTSC and PAL/NTSC (or multistandard together with the SECAM decoder TDA8395) receivers can be built. Functionally this IC series is split in to 2 categories: • Versions intended to be used in economy TV receivers with all basic functions • Versions with additional functions such as E-W geometry control, horizontal and vertical zoom function and YUV interface which are intended for TV receivers with 110° picture tubes. The various type numbers are given in Table 1 . The detailed differences between the various ICs are given in Table 2 . Table 1 TV receiver versions | TV RECEIVERS | SDIP56 PACKAGE | | QFP64 PACKAGE | | | --- | --- | --- | --- | --- | | | ECONOMY | MID/HIGH END | ECONOMY | MID/HIGH END | | PAL only | TDA8374B | − | TDA8374BH | − | | PAL/NTSC (SECAM) | TDA8374 and TDA8374A | TDA8375 and TDA8375A | TDA8374AH | TDA8375AH | | NTSC | TDA8373 | TDA8377 and TDA8377A | − | − | 1997 Jul 01 2 I2C-bus controlled economy PAL/NTSC and NTSC TV-processors TDA837x family Table 2 Differences between the various ICs | CIRCUITS | IC VERSION (TDA) | | | | | | | | | --- | --- | --- | --- | --- | --- | --- | --- | --- | | | 8373 | 8374 | 8374A(H) | 8374B(H) | 8375 | 8375A(H) | 8377 | 8377A | | Multistandard IF | − | X | − | − | X | X | − | − | | Automatic Volume Levelling (AVL) | X | X | − | − | − | − | − | − | | PAL decoder | − | X | X | X | X | X | − | − | | SECAM interface | − | X | X | X | X | X | − | − | | NTSC decoder | X | X | X | X | X | X | X | X | | Colour matrix PAL/NTSC (Japan) | − | X | X | X | X | X | − | − | | Colour matrix NTSC (USA/Japan) | X | − | − | − | − | − | X | X | | YUV interface | − | − | − | − | X | X | X | X | | Horizontal geometry | − | − | − | − | X | X | X | X | | Horizontal and vertical zoom | − | − | − | − | X | X | X | X | QUICK REFERENCE DATA | SYMBOL | PARAMETER | CONDITIONS | MIN. | TYP. | MAX. | UNIT | | --- | --- | --- | --- | --- | --- | --- | | Supplies | | | | | | | | VP | supply voltage | | − | 8.0 | − | V | | IP | supply current | | − | 110 | − | mA | | Input voltages | | | | | | | | V48,49(rms) | video IF ampliﬁers sensitivity (RMS value) | | − | 70 | − |

FAQs

What televisions systems are supported by the TDA837x family, and which type numbers correspond to each standard?

TDA8374 and TDA8375 are intended for PAL/NTSC television receivers, while TDA8373 and TDA8377 are intended for NTSC television receivers.

What main features distinguish the TDA837x TV processors?

Key features include a vision IF amplifier with differential phase/gain suitability, a PLL IF demodulator, an alignment-free sound demodulator, flexible CVBS/Y-C source selection, integrated chrominance filtering with auto-calibration, and I2C-bus control of various functions.

How do the economy and mid/high-end versions differ?

The datasheet separates versions into economy receivers with basic functions and versions with additional functions such as E-W geometry control, horizontal/vertical zoom, and a YUV interface for 110° picture tubes.

Oct 12, 2026

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