MN3004 - 512-Stage Low Noise BBD - Audio Delay and Electrical Characteristics

Oct 12, 2026

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MN3004 is a 512-stage, low-noise BBD designed for high performance audio signal processing, achieving a typical 85 dB signal-to-noise ratio through increased capacitor capacity on the same chip area. It supports adjustable analog audio delay from 2.56 ms to 25.6 ms by selecting the clock frequency, with features such as low insertion loss, wide dynamic range, low noise (0.21 mVrms max), and low distortion (0.4% typ). The device enables clock frequency cancellation capability and applications including echo/reverberation, tremolo/vibrato/chorus, and voice communication delay lines.

LanguageEnglish

CategoryTechnology

FormatPDF

Pages5

Reading Time13 min

AccessFree to download

General Description

Features

Applications

Quick Reference Data

Absolute Maximum Ratings (Ta=25°C)

Operating Conditions (Ta=25°C)

Circuit Diagram

Block Diagram

Electrical Characteristics (Ta=25°C)

Terminal Assignments

Typical Electrical Characteristic Curves

Application Circuit

The MN3004 is a 512-stage high performance low noiseBBD that provides a 85dB of signal to noise ratio(S/N)byincreasing a capacity of capacitors with the same chip area,which is enabled by the improvement of silicon materials andprocess.There are many features for this device such as lowinsertion loss and no back gate bias voltage VBB,etc. The MN3004 can delay analog signal of the audio band inthe range of 2.56ms～25.6ms by adjusting a clock frequency. ● Variable delay of audio signal:2.56ms～25.6ms ● Clock component cancellation capability. ● Low insertion loss:Li=1/5dB typ. ● Wide dynamic range:S/N~85dB typ. ● Wide frequency response:fi≤0.3×fcp ● Clock frequency range:10～100KHz ● Low noise:Vno=0.21mVrms max. ● Low distortion:THD=0.4%typ. ● Variable playback speed of tape recorder. ● Reverberation and echo effects of audio equipments such asstereo. ● Tremolo,vibrato and chorus effects in electronic musicalinstruments. ● Variable or fixed delay of analog signals. ● Telephone time compression and delay line for voicecommunication systems. ■Block Diagram | Item | Symbol | Value | Unit | | --- | --- | --- | --- | | Supply Voltage | VDD,VGc | -15,VoD+1 | V | | Signal Delay Time | to | 2.56～25.6 | ms | | Total Harmonic Distortion | THD | 0.4 | % | | Signal to Noise Ratio | S/N | 85 | dB | MN3004 512-STAGE LOW NOISE BBD # ■General Description ■ Features ■Applications ● Others. # ■Quick Reference Data MN3000 Series # ■Absolute Maximum Ratings(Ta=25℃) ■Operating Conditions(Ta=25℃) *1 Clock Pulse Wavefroms *2 T=1/fcp(Clock Period) # ■Circuit Diagram Panasonic | Item | Symbol | Ratings | Unit | | --- | --- | --- | --- | | Terminal Voltage | VDD,Vec,Vcp,V | —18～+0.3 | V | | Output Voltage | Vo | —18～+0.3 | V | | Operating Temperature | Topr | —20～+60 | ℃ | | Storage Temperature | Tstg | —55～+125 | ℃ | | Item | Symbol | Condition | Min. | Typ. | Max. | Unit | | --- | --- | --- | --- | --- | --- | --- | | Drain Supply Voltage | VDD | | -14 | -15 | -16 | V | | Gate Supply Voltage | VaG | | | VoD+1 | | V | | Clock Voltage "H"Level | VcPH | | 0 | | -1 | V | | Clock Voltage "L"Level | VcPL | | | Voo | | V | | Clock Input Capacitance | Ccp | | | | 350 | pF | | Clock Frequency | fcp | | 10 | | 100 | kHz | | Clock Pulse Width*1 | cpw | | | | 0.5T※2 | | | Clock Rise Time*1 | tcpr | | | | 500 | ns | | Clock Fall Time*1 | tcpf | | | | 500 | ns | | Clock Cross Point | V× | | 0 | | -3 | V | | Input DC Bias | VBias | | -5 | | -10 | V | # ■Electrical Characteristics(Ta=25°℃,VoD =VcPL=-5V,VcPH=OV,VGG=-14V,RL=KΩ2) | ltem | Symbol | Condition | Min. | Typ. | Max. | Unit | | --- | --- | --- | --- | --- | --- | --- | | Signal Delay Time | tp | | 2.56 | | 25.6 | ms | | Input Signal Frequency | fi | fcp*40kHz,V;=1.8Vrms,
3dB down l0 dB atf;=1kHz) | 12 | | | kHz | | Input Signal Swing | V; | fcp=40kHz,fi=1kHz,THD≤2.5% | 1.8 | | | Vrms | | Insertion Loss | Li | fcp=40kHz,fi=1kHz,Vi=1.8Vrms | -4 | 1.5 | 4 | dB | | Total Harmonic Distortion | THD | fcp=40kHz,f;=1kHz,V;=1 Vrms | | 0.4 | 2.5 | % | | Noise Voltage | Vno | fcP=100kHz Weighted by"A"curve | | | 0.21 | mVrms | | Signal to Noise Ratio | S/N | | | 85 | | dB | # ■Terminal Assignments (Top View) MN3000 Series ■Typical Electrical Characteristic Curves Vo—VI DC Input Voltage V:(V) THD—fcp Total Harmnic Distortion THD(%) Clock Frequency fep(kHz) Vno—VDD Supply Voltage VDD(V) Vo—Vi Input Signal Level V;(Vrms) Gi—fcp Clock Frequency fep(kHz) Vno—fcp Clock Frequency fep(kHz) rotal Harmonic Distortion THD(%) THD—Vi Input Signal Level V;(Vms) Gi—fj Input Frequency f₁(Hz) MN3000 Series ■Supply

FAQs

What signal delay range does the MN3004 provide?

The MN3004 delays analog audio signals in the range of 2.56 ms to 25.6 ms by adjusting the clock frequency.

What are the typical noise and distortion performance values?

It has low noise with a typical maximum noise voltage of 0.21 mVrms, and low total harmonic distortion with THD of 0.4% typ.

How is the audio delay time controlled in the MN3004?

The delay time is controlled by the clock frequency; changing the clock component sets the signal delay to the desired range.

Oct 12, 2026

Upload by Ben