IN3160 - Finite State Machines - Course Goals and Learning Outcome

Oct 26, 2026

Upload by Jacob

Course materials for IN3160/IN4160 on finite state machines focus on principles for design and testing of digital systems. Learning outcomes include understanding the relationship between behavior and construction criteria, describing advanced digital systems at multiple abstraction levels, and performing simulation and synthesis. The lesson goals introduce state machines and key variants, covering Moore and Mealy types, specification using state tables, state diagrams, ASM diagrams, and VHDL, followed by guidance on FSM motivation, representations, and example direction.

LanguageEnglish

CategoryExam

FormatPDF

Pages41

Reading Time1 h 43 min

AccessFree to download

Messages

Course Goals and Learning Outcome

Goals for this lesson

Overview Today

Why/What is an FSM?

General FSM in HW

Combinational logic and non-FSM sequential logic

Output decoding in FSM (Moore vs Mealy)

Input synchronizer and output synchronizer

Fully synchronized Mealy FSM

IN3160 IN4160 Finite State Machines Yngve Hafting Messages • Assignment 6 – beta is posted – Progress in 6, 8 and 10 are tied – Read specifications, not only task – Start early (greater task = longer time) • FSM-videos from 2017 re-posted with text (autotext) – Mostly very good (se last pages) – use the newer source code for reference: • [https://www.uio.no/studier/emner/matnat/ifi/](https://www.uio.no/studier/emner/matnat/ifi/IN3160/v23/fsm-videoer/src-traffic.zip)[IN3160/v23/fsm-videoer/src-traffic.zip](https://www.uio.no/studier/emner/matnat/ifi/IN3160/v23/fsm-videoer/src-traffic.zip) Course Goals and Learning Outcome [https://www.uio.no/studier/emner/matnat/ifi/IN3160/index-eng.html](https://www.uio.no/studier/emner/matnat/ifi/IN3160/index-eng.html) In this course you will learn about the design of advanced digital systems. This includes programmable logic circuits, a hardware design language and system-on-chip design (processor, memory and logic on a chip) . Lab assignments provide practical experience in how real design can be made. After completion of the course you will: • understand important principles for design and testing of digital systems • understand the relationship between behaviour and different construction criteria • be able to describe advanced digital systems at different levels of detail • be able to perform simulation and synthesis of digital systems. Goals for this lesson: • Know different types of state machines • What is a state machine • Moore type machines • Mealy type machines • To specify state machine functionality using • State tables • State diagrams • Algorithic state machine diagrams • VHDL • To know pro’s and con’s for • Moore and Mealy • Different state machine representations Overview Today • What is finite state machines (FSM)? – General FSM – Moore type FSM – Mealy – Synchronized Mealy • FSM representations – State diagram – State output table – Algorithmic State Machine (ASM) diagrams • FSM example with VHDL and testbench Next: • Datapath state machines Why/What is an FSM? • Names – Finite State Machine "FSM" – Finite State Automaton "FSA" – State Machine (Never seen "SM" used for this) – Finite automaton • A description of something that happens in a more or less fixed sequence – Going through a set of states • Not an FSM? "ISM" / "ESM"? – Near infinite or endless amount of states... • Any computer program could be called an "FSM", – we do not use the term FSM for SW in general • Example FSM? – Traffic light implementation – Pushbutton user interfaces • Vending machine • Washing machine program – Bus controller – Arbitration algorithm – Microprocessors, etc • FSMs can be made in HW, FW or SW. (We'll cover HW) General FSM in HW • General FSM – Combinational logic connected to registers with feedback – Can be nearly any clocked logic • Counter • LFSR • Shiftregister • Timer • Microprocessor • Vending machines… • Etc. Combinational logic Input State | D
| Q
CLK | | --- | --- | | | D
| Q
CLK | | | --- | --- | --- | --- | | | | | | Combinational logic 7 Non FSM sequental logic? • Strictly speaking any logic using registers (FFs) are FSMs , but… • We usually don’t refer to things as FSMs when they – Have well known names or near-infinite states • Shift registers, • Counters , Timers • LFSR (linear feedback shift registers) • Microprocessors • – are pure datapath representations | D
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CLK | | --- | --- | ouput • No feedback after registers 8 Output decoding in FSM • Two types: – Moore • Output is entirely decoded from state registers – Mealy • Output is decoded from input and state registers Input Output Combinational logic Combinational logic Mealy FSM Output CL State CL • Fast output ! •• AsHayznchrardso! nous output! Moore FSM • O

FAQs

What are the key learning outcomes for this finite state machines course?

After completion, learners can understand principles for design and testing, explain the relationship between behavior and construction criteria, describe advanced digital systems at different levels of detail, and perform simulation and synthesis.

How do Moore and Mealy state machines differ in output behavior?

Moore machine outputs are decoded entirely from state registers, while Mealy machine outputs are decoded from input and state registers.

How can hazards and delays be handled in synchronized Mealy designs?

The materials present input and output synchronizers; the solution uses fully synchronized Mealy FSM concepts where input/output synchronization removes hazards while maintaining minimum delay within the state machine design.

Oct 26, 2026

Upload by Jacob