Huawei Research Issue 6

Aug 21, 2026

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Huawei Research Issue 6 focuses on AI’s role in industrial and scientific modeling and high-performance computing. It covers scalable spatial computing beyond the von Neumann model, speculative task-level parallelism via Hive, and hybrid optical-electrical switching networks for training clusters. It also discusses Ascend HiFloat8 and FP SQRT microarchitecture approaches, along with hardware-software co-design using dynamic/JIT compilation, data-centric HPC auto-tuning, and optimization methods such as Momentum Reconstruction (MoRe).

LanguageEnglish

CategoryResearch & Report

FormatPDF

Pages272

Reading Time11 h 25 min

AccessFree to download

Editorial Note

Application Frameworks of AI for Industrial and Scientific Modeling and Computing

Spatial Computing and Task-Parallel Architecture (Hive)

Optoelectronic Hybrid Switching Networks and Training Cluster Communication

Floating-Point Formats and FP SQRT Microarchitecture Precision Schemes

Dynamic/JIT Compilation and Hardware-Software Co-Optimization

Data-Centric HPC Auto-Tuning (DCTuner)

Graph/Algebraic Programming Paradigms and Training Optimization (MoRe, etc.)

Multimodal and Robust Reinforcement Learning Methods

Editorial Note

In this Huawei Research issue, we explore AI's transformative power in industrial and scientific modeling and computing. Our focus encompasses a broad spectrum of topics, including computing architectures, data types, the intricacies of hardware-software co-design, the development of algorithm models and architectures, and the exploration of various theories. Our objective is to offer an in-depth yet easily understandable analysis of the prevailing challenges and opportunities in AI technologies.

We systematically explain how AI can be effectively applied in industrial and scientific modeling and computing to address problems that have remained unsolved for over 200 years and are challenging to solve using existing AI statistical modeling. We explore how computer graphics and multimedia technologies can be integrated to create holographic media representations and non-geometric 3D scenario modeling. Additionally, we discuss the development of intelligent devices that can work in harmony with humans and complex environments. We also delve into the development of robotics without the use of coordinate systems. Finally, we examine how nonlinear system signals can be processed in the signal and system domain, leading to more accurate modeling methods. We aim to provide valuable insights and guidance for the next generation of AI technologies to tackle complex challenges.

Spatial Computing introduces a novel, highly scalable architecture that transcends the conventional von Neumann model, designed to cater to the exponential computing power demands essential for AI advancements. Reprioritizing Speculative Task-Level Parallelism presents Hive, a cutting-edge task-based execution model and multicore architecture that enhances performance and optimizes energy efficiency. Hive leverages a wealth of fine-grained parallelism inherent in algorithms, employing dynamic priority updates to optimize execution. Hive ensures the integrity of speculative scheduling updates and prevents spurious task conflicts, establishing itself as an industry-leading hardware solution that significantly outperforms software-only parallel schedulers in efficiency and performance. Exploration of Hybrid Optical-Electrical Switching Networks in AI Training Clusters presents a groundbreaking hybrid optical-electrical switching network tailored for large-scale, high-bandwidth, and adaptable operations, addressing the challenges of cost and power consumption prevalent in computationally intensive scenarios such as AI and high-performance computing (HPC) . Additionally, it introduces a novel collective communication algorithm optimized for this hybrid network, enhancing the efficiency of communication operations within AI training clusters. Ascend HiFloat8 AI Training and Inference doubles the computing power with a minimal increase in area by introducing an innovative 8-bit floating-point format, HiF8 . This development, coupled with HiF8-based AI training and inference solutions, marks a substantial improvement in computing efficiency. To overcome hardware performance bottlenecks caused by complex CPU instructions for floatingpoint square root (FP SQRT) computation, DP SQRT Computation Principle and Ultra-Low Latency Microarchitecture Design introduces an FP SQRT computation precision doubling method. This method segregates high and low bits and is paired with a corresponding microarchitecture design, enhancing computing precision and system performance.

In hardware-software co-design and optimization, modern language implementations are increasingly leveraging dynamic or just-in-time (JIT) compilation techniques. This approach capitalizes on a unique opportunity to monitor and analyze the state of a program during its execution, allowing for real-time optimizations and enhancements that traditional compilation methods cannot offer. Balancing the Yin and Yang of Dynamic Compilation and Execution proposes innovative strategies for hardware-soft

FAQs

What AI research directions does this issue of Huawei Research mainly focus on?

It revolves around the applications of AI in industrial and scientific modeling and computing, covering computing architectures, data types, hardware-software co-optimization, algorithmic models and frameworks, as well as relevant theories, challenges, and opportunities.

How does the article introduce the significance of spatial computing relative to the traditional von Neumann model?

Spatial Computing introduces a highly scalable architecture that goes beyond the von Neumann model to meet the exponential computational capacity demands driven by AI development.

What key technologies are presented in this issue for hardware training cluster communication and computing efficiency?

It proposes an optoelectronic hybrid switching network for large-scale, high-bandwidth training alongside collective communication algorithms tailored for this network; it also discusses schemes such as HiFloat8, FP SQRT computing precision, and ultra-low-latency microarchitectures to boost training and inference efficiency.

Aug 21, 2026

Upload by Connor