High Speed and Low Leakage Power Voltage Level Shifter using Regulated Cross-Coupled Network - Abstract

Oct 22, 2026

Power-efficient voltage level shifting is achieved using a regulated cross-coupled network with a split inverter. The regulated cross-coupled network substantially reduces pull-up region power dissipation, while the split inverter at the output lowers short-circuit current. A modified split inverter combined with the output load capacitor improves operational speed and reduces overall power consumption. Compared with other approaches, this level shifter saves 31% power and is validated through LTspice simulations in 50 nm and 90 nm technologies.

LanguageEnglish

CategoryTechnology

FormatPDF

Pages10

Reading Time25 min

AccessFree to download

1. Introduction

2. Literature Survey

2.1. Level Shifters

2.2. Existing Method

High Speed and Low Leakage Power Voltage Level Shifter using Regulated Cross-Coupled Network Mohan Rao Thokala Department of Electronics and Communication Engineering, National Institute of Technology Calicut, Kerala State, India Abstract This concise presents a power efficient level shifter using regulated cross-coupled network with split inverter. With the use of regulated cross-coupled network, power dissipation of the pull-up region drastically decreases. Level shifters convert the voltage levels which are below the threshold voltage to the acceptable voltage levels by decreasing the transistor size. A Split inverter is used at the output to decrease the short circuit current. Modified Split inverter along with the load capacitor at the output is used to increase the speed and to decrease the power consumption. This LS can save 31% power compared to other techniques. The proposed level shifter works effectively at high speed and consumes less power. For simulation, LT spice tool of 50 nm technology and 90 nm technology is used. Keywords: Level shifter, split-inverter, RCC network, threshold level, leakage power, short-circuit power. Received: 22 February 2023 Revised: 19 May 2023 Accepted: 2 June 2023 1. Introduction Level shifter is a circuit, that is used to convert signals from one logic state to another logic state, which is applicable to circuits like CMOS and TTL. Level shifters are used in various domains like processor applications, sensors and VLSI design circuits. Voltages of 3.3V ,1.8V and even less voltage values are needed. Digital systems use level shifters to provide different voltage level logics to different blocks of a system, without shifters it is difficult to provide different voltages to different blocks within the system. Transition from high to low is often optional, but conversion from low to high is required in most cases. Level shifters are placed at the top, bottom or can be even at midway of circuit. Power dissipation depends on supply voltage, load capacitance, frequency and on switching activation factor. By decreasing all these, we can reduce the power dissipation. Reducing the supply voltage by half decreases the power dissipation to 75%, but it affects the performance. For CMOS transistor, both static power and dynamic power are present. Leakage power occurs when the circuit is in the OFF state. Short circuit power and switching power both will play a key role in dynamic power dissipation; the dynamic power is present when circuit is switching (Luo, Huang, & Chu, 2014) . There are many techniques to reduce the dynamic power by transistor sizing, clock gating, power gating, logic optimization, multiple supply voltage, pipeline, parallel processing, architecture planning, etc. In all the cases, by bringing down the supply voltage, the power dissipation reduced greatly, but it costs the speed performance. By providing different voltages to different blocks using a level shifter is a good choice (Maghsoudloo, ezaei, Sawan, & Gosselin, 2016; Hosseini, Saberi, & Lotfi, 2017) . Supply voltages for the MOS transistors which are less than its Vth, possible with level shifters. Level shifter using a cross-coupled network drastically reduces the power dissipation and the speed of getting output increases. This LS method is usable for a large range of inputs. * Corresponding author. [E-mail address](E-mail address: mohan_p220124ec@nitc.ac.in)[: mohan_p220124ec@nitc.ac.in](E-mail address: mohan_p220124ec@nitc.ac.in) 2. Literature Survey 2.1. Level Shifters 2.1.1. LS using Current Mirror Level shifters can be implemented using current mirror, but there is one disadvantage with this design is that, there is no proper interaction between the pull-down transistors and pull-up transistors, it causes to high standby power is present due to static current. 2.1.2. LS using DCVS DCVS based LS consists of cross-coupled network at pull-up, it can improve the interaction between pul

FAQs

What problem does the proposed level shifter address?

It targets high speed operation with reduced leakage power and reduced short-circuit power by using a regulated cross-coupled network and a split inverter at the output.

How does the regulated cross-coupled network help power efficiency?

It drastically decreases power dissipation in the pull-up region by improving the interaction and charging/discharging efficiency within the circuit.

How does the output split inverter reduce short-circuit current?

Placing a split inverter at the output, and using a modified split inverter with the output load capacitor, reduces short-circuit current while increasing speed and lowering power consumption.

Oct 22, 2026

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