amd-cdna-3-white-paper - Introducing AMD CDNA™ 3 Architecture

Oct 25, 2026

A technical overview of the AMD CDNA™ 3 architecture and its role in modern accelerated computing. The paper explains how GPU evolution and AMD’s CPU-GPU unification are enabled through CDNA 2 and CDNA 3, advanced packaging, and AMD Infinity Fabric. It details the Instinct MI300 Series design, including 3D packaging, chiplet repartitioning of compute, memory, and communication, cache/memory hierarchy changes, and sparse data support. Performance focus covers discrete GPU (MI300X/MI325X) and datacenter APU (MI300A) configurations, including compute, precision, and latency advantages for demanding workloads.

LanguageEnglish

CategoryTechnology

FormatPDF

Pages28

Reading Time1 h 11 min

AccessFree to download

Introduction

Architecture Overview

Advanced 3D Package and Chiplet Construction

Instinct MI300A APU vs MI300X/MI325X GPUs

Chiplet Architecture Repartitioning

XCDs and Fabric-on-Chip Connectivity

AMD CDNA 3 Compute

Accelerator Complex Dies (XCDs)

INTRODUCTION Over the past three decades, GPUs have revolutionized the entire computing ecosystem, from smartphones and PCs to data centers. Some of the most exciting applications today, enabled by machine learning, would not be possible without GPU acceleration. Over this time, the humble graphics card has transformed from a fixed-function offload engine to a general-purpose processor that accelerates programming languages such as Python, C++, and Fortran -and its evolution continues. AMD has pioneered the evolution of system architecture over the last decade to unify CPU and GPU computing at an unparalleled scale. AMD InstinctTM MI250X, at the heart of the first Exascale system, was enabled by the AMD CDNA™ 2 architecture and advanced packaging, as well as AMD Infinity Fabric™, connecting the Instinct GPUs and AMD EPYC™ 7453s CPU with cache coherence. The AMD Instinct MI200 accelerator family took initial steps towards advanced packaging, with two identical dies each incorporating the three essential elements of compute, memory, and communication. AMDCDNA 2 incorporated comprehensive improvements, particularly focusing on improving the communication interfaces to scale to the largest systems. The AMD CDNA™ 3 architecture continues to lead this evolution, as the AMD accelerated computing strategy embraces advanced packaging to enable heterogeneous integration. This strategy delivers outstanding performance, changing the computing paradigm with a coherent programming model that tightly couples CPUs and GPUs together to tackle the most demanding problems of our era. The AMD CDNA™ 3 architecture offers significant advancements and delivers the highest performance, efficiency, and programmability to date in the latest AMD Instinct MI300 Series products. As Figure 1 shows, the architecture leverages the latest advancements in 3D packaging technologies and fundamentally repartitions the compute, memory, and communication elements of the processor across aheterogenous package. The Instinct MI300 Series products integrates up to 8 vertically stacked accelerator complex dies (XCD) and 4 I/O dies (IOD) containing system infrastructure, all tied together with the AMD Infinity Fabric™ technology and connecting to 8 stacks of high-bandwidth memory (HBM) . At the lowest level, the computational throughput for vector and matrix data within the GPU cores is enhanced and augmented with native support for sparse data. At the macro level, this radical rethinking of the physical implementation is paired with an entirely redesigned cache and memory hierarchy that scales gracefully with the increased compute, and also integrates cache coherency as a first class citizen. WHITE PAPER | INTRODUCING AMD CDNA™ 3 ARCHITECTURE 2 Figure 1. Advanced 3D Package and chiplet-based construction of the AMD Instinct™ MI300 Series processors This design provides the versatility to construct AMD CDNA 3 variants, such as the Instinct MI300X and MI325X discrete GPUs or the Instinct MI300A APU, shown below in Figure 2. The Instinct MI300X discrete GPU focuses primarily on accelerator compute and incorporates 8 accelerator complex dies (XCD) . For reduced precision data common in machine learning, the Instinct MI300X and MI325X discrete GPUs offer significant generational performance gains, with 3.4-6. 8X the peak throughput and with peak theoretical FP8 performance of 2.6 PFLOP/s.MI300-11 For classic HPC workloads that use single-and double-precision, the computational throughput has increased 1 .7-3.4X offering 163.4 TFLOP/S FP64 Matrix for a single processor.MI300-11, MI325X-019 In contrast, the Instinct MI300A APU is complete with CPU, GPU, and memory on one package. It reduces the accelerator computational capacity of the Instinct MI300X GPU by 25% to make room for three “Zen 4” x86-based CPU dies that are tightly coupled with 6 GPU dies. The APU shares a single pool of virtual and physical memory with extraordinarily low latency. The Instinct

FAQs

What is the main purpose of the AMD CDNA™ 3 architecture?

It advances accelerated computing by using advanced packaging and a coherent programming model that tightly couples CPUs and GPUs. The architecture targets the highest performance, efficiency, and programmability for the latest AMD Instinct MI300 Series products.

How does the Instinct MI300 series packaging and chiplet design work?

The architecture repartitions compute, memory, and communication across a heterogenous package using 3D packaging and chiplets. It connects vertically stacked XCDs and I/O dies (IODs) via AMD Infinity Fabric and ties them to high-bandwidth memory stacks.

What are the key differences between the Instinct MI300X/MI325X GPUs and the MI300A APU?

MI300X/MI325X are discrete GPUs focused on accelerator compute with multiple accelerator complex dies. MI300A integrates CPU, GPU, and memory on one package, shares a single memory pool, reduces accelerator capacity to make space for Zen 4 CPU dies, and removes host/device copy overhead.

Oct 25, 2026

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