128-Kbit serial I2C bus EEPROM - Datasheet

Oct 12, 2026

M24128 is a 128 Kbit (16 Kbytes) serial I2C bus EEPROM with a 64-byte page size, supporting byte write and page write in under 5 ms. It operates with a single supply across 1.7 V to 5.5 V and provides random and sequential read modes, including device addressing and identification-page functions for specific order codes. The device features full-array write-protect, enhanced ESD/latch-up protection, over 4 million write cycles, and more than 200-year data retention.

LanguageEnglish

CategoryTechnology

FormatPDF

Pages46

Reading Time1 h 56 min

AccessFree to download

Contents

Description

Signal description

Memory organization

Device operation

Instructions

Read operations

Initial delivery state

Maximum rating

DC and AC parameters

Package mechanical data

Part numbering

Revision history

| | | M24128-BW M24128-BR
M24128-BF M24128-DF | | --- | --- | --- | | 128-Kbit serial I² C bus EEPROM | | | | TSSOP8 (DW)
169 mil width
SO8 (MN)
150 mil width
UFDFPN8
(MC)

| | | --- | --- | |
WLCSP (CS) |
UFDFPN5
(MH) | | Unsawn wafer | | Datasheet-production data Features • Compatible with all I2C bus modes: – 1 MHz – 400 kHz – 100 kHz • Memory array: – 128 Kbit (16 Kbytes) of EEPROM – Page size: 64 bytes – Additional Write lockable page (M24128-D order codes) • Single supply voltage and high speed: – 1 MHz clock from 1.7 V to 5.5 V • Write: – Byte Write within 5 ms – Page Write within 5 ms • Operating temperature range: – from-40 °C up to +85 °C • Random and sequential Read modes • Write protect of the whole memory array • Enhanced ESD/Latch-Up protection • More than 4 million Write cycles • More than 200-years data retention Packages • SO8 ECOPACK2® • TSSOP8 ECOPACK2® • UFDFPN8 ECOPACK2® • WLCSP ECOPACK2® • UFDFPN5 ECOPACK2® • Unsawn wafer (each die is tested) October 2015 DocID16892 Rev 27 1/46 This is information on a product in full [production.](production. www.st.com)[ www.st.com](production. www.st.com) Contents 1 Description ................................................. 6 2 Signal description ........................................... 8 2.1 Serial Clock (SCL) ........................................... 8 2.2 Serial Data (SDA) ............................................ 8 2.3 Chip Enable (E2, E1, E0) ...................................... 8 2.4 Write Control (WC) ........................................... 8 2.5 VSS (ground) ............................................... 8 2.6 Supply voltage (V CC) ......................................... 9 2.6.1 Operating supply voltage (V CC) ................................ 9 2.6.2 Power-up conditions ........................................ 9 2.6.3 Device reset ............................................... 9 2.6.4 Power-down conditions ...................................... 9 3 Memory organization ....................................... 10 4 Device operation ........................................... 11 4.1 Start condition .............................................. 12 4.2 Stop condition .............................................. 12 4.3 Data input ................................................. 12 4.4 Acknowledge bit (ACK) ...................................... 12 4.5 Device addressing .......................................... 13 5 Instructions ............................................... 14 5.1 Write operations ............................................ 14 5.1.1 Byte Write ............................................... 15 5.1.2 Page Write ............................................... 16 5.1.3 Write Identification Page (M24128-D only) ...................... 17 5.1.4 Lock Identification Page (M24128-D only) ....................... 17 5.1.5 ECC (Error Correction Code) and Write cycling .................. 17 5.1.6 Minimizing Write delays by polling on ACK ...................... 18 5.2 Read operations ............................................ 19 5.2.1 Random Address Read ..................................... 20 2/46 DocID16892 Rev 27 5.2.2 Current Address Read ...................................... 20 5.2.3 Sequential Read .......................................... 20 5.3 Read Identification Page (M24128-D only) ....................... 20 5.4 Read the lock status (M24128-D only) ........................... 21 6 Initial delivery state ......................................... 22 7 Maximum rating ............................................ 23 8 DC and AC parameters ...................................... 24 9 Package mechanical data .................................... 33 9.1 UFDFPN5 package information ................................ 33 9.2 TSSOP8 package informatio

FAQs

What memory capacity and page size does this EEPROM provide?

It offers 128 Kbit (16 Kbytes) of EEPROM memory and a 64-byte page size.

What write performance and supply voltage range are supported?

Byte write and page write complete within 5 ms, and the device supports single-supply operation from 1.7 V to 5.5 V with up to a 1 MHz clock.

Which protections and data retention specifications are included?

The whole memory array can be write-protected, and it includes enhanced ESD/latch-up protection with over 4 million write cycles and more than 200-years data retention.

Oct 12, 2026

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