[{"data":1,"prerenderedAt":-1},["ShallowReactive",2],{"doc-seo-239241-105":3,"detail-sidebar-cat-1-en-105":80,"doc-detail-239241-en":126},{"code":4,"msg":5,"data":6},0,"ok",{"site_id":7,"language":8,"slug":9,"title":10,"keywords":11,"description":12,"schema_data":13,"social_meta":73,"head_meta":75,"extra_data":77,"updated_unix":79},105,"en","are-you-safe-yet-safety-mechanism-insertion-and-validation","Are You Safe Yet - Safety Mechanism Insertion and Validation","","Functional safety is increasingly critical in modern industrial and automotive designs, requiring legacy architectures to be upgraded to meet system safety goals. A structured flow combines safety synthesis and formal verification: identify design regions needing stronger fault detection, insert appropriate safety mechanisms, validate the resulting design changes, and apply formal fault injection to quantify diagnostic coverage. The work covers register- and module-level mechanisms and verifies both correct insertion and intended operation.",{"@graph":14,"@context":72},[15,34,55],{"@type":16,"itemListElement":17},"BreadcrumbList",[18,23,27,31],{"item":19,"name":20,"@type":21,"position":22},"https://docshare.wps.com","Home","ListItem",1,{"item":24,"name":25,"@type":21,"position":26},"https://docshare.wps.com/template/","Template",2,{"item":28,"name":29,"@type":21,"position":30},"https://docshare.wps.com/template/posters/","Posters",3,{"item":32,"name":10,"@type":21,"position":33},"https://docshare.wps.com/template/are-you-safe-yet-safety-mechanism-insertion-and-validation/239241/",4,{"url":32,"name":10,"@type":35,"image":36,"author":41,"headline":10,"publisher":44,"fileFormat":47,"inLanguage":8,"description":12,"dateModified":48,"datePublished":49,"encodingFormat":47,"isAccessibleForFree":50,"interactionStatistic":51},"DigitalDocument",{"url":37,"@type":38,"width":39,"height":40},"https://docshare.wps.com/thumbnails/are-you-safe-yet-safety-mechanism-insertion-and-validation/239241.png","ImageObject",442,249,{"name":42,"@type":43},"Jake","Person",{"url":19,"name":45,"@type":46},"DocShare","Organization","application/pdf","2026-10-16","2026-09-11",true,{"@type":52,"interactionType":53,"userInteractionCount":26},"InteractionCounter",{"@type":54},"ViewAction",{"@type":56,"mainEntity":57},"FAQPage",[58,64,68],{"name":59,"@type":60,"acceptedAnswer":61},"What major steps does the proposed verification flow follow?","Question",{"text":62,"@type":63},"The flow explores where stronger fault detection is needed, inserts safety mechanisms via safety synthesis, validates changes using formal verification (SLEC), and performs formal fault injection to measure diagnostic coverage.","Answer",{"name":65,"@type":60,"acceptedAnswer":66},"What kinds of register-level safety mechanisms are discussed?",{"text":67,"@type":63},"Register-level mechanisms include parity generation/checking, double or triple modular redundancy for selected register lists, error correction (including single-error correction with double-error detection for register banks), and protocol checking for valid FSM state transitions.",{"name":69,"@type":60,"acceptedAnswer":70},"How does SLEC verify safety mechanism insertion and operation?",{"text":71,"@type":63},"For insertion, SLEC compares a design without safety mechanisms (A) to a design with TMR (B) to prove correct insertion. For operation, on-the-fly fault injection compares a fault-injected design against a fault-free copy to check whether faults can escape or remain undetected.","https://schema.org",{"og:url":32,"og:type":74,"og:title":10,"og:site_name":45,"og:description":12},"article",{"robots":76,"canonical":32},"index,follow",{"doc_id":78,"site_id":7},239241,1792170293,{"code":4,"msg":81,"data":82},"success",[83,88,93,98,102,107,112,117,122],{"id":84,"doc_module":22,"doc_module_name":25,"category_name":85,"show_sort_weight":86,"slug":87},11,"Presentations",90,"presentations",{"id":89,"doc_module":22,"doc_module_name":25,"category_name":90,"show_sort_weight":91,"slug":92},12,"Resumes",80,"resumes",{"id":94,"doc_module":22,"doc_module_name":25,"category_name":95,"show_sort_weight":96,"slug":97},14,"Invoices",70,"invoices",{"id":99,"doc_module":22,"doc_module_name":25,"category_name":29,"show_sort_weight":100,"slug":101},15,60,"posters",{"id":103,"doc_module":22,"doc_module_name":25,"category_name":104,"show_sort_weight":105,"slug":106},16,"Social Media",50,"social-media",{"id":108,"doc_module":22,"doc_module_name":25,"category_name":109,"show_sort_weight":110,"slug":111},17,"Forms",40,"forms",{"id":113,"doc_module":22,"doc_module_name":25,"category_name":114,"show_sort_weight":115,"slug":116},18,"Letters",30,"letters",{"id":118,"doc_module":22,"doc_module_name":25,"category_name":119,"show_sort_weight":120,"slug":121},21,"Paper Templates",5,"papers-templates",{"id":123,"doc_module":22,"doc_module_name":25,"category_name":124,"show_sort_weight":4,"slug":125},158,"General","general-158",{"code":4,"msg":81,"data":127},{"doc_id":78,"user_id":128,"nickname":42,"user_avatar":129,"doc_module":22,"category_id":99,"category_name":29,"doc_title":10,"doc_description":12,"doc_content":130,"file_id":131,"file_url":132,"file_type":133,"file_size":134,"view_count":26,"is_deleted":4,"is_public":22,"is_downloadable":22,"audit_status":22,"page_count":22,"language":135,"language_code":8,"site_id":7,"html_lang":8,"table_of_contents":136,"faqs":137,"seo_title":138,"seo_description":12,"update_tm":139,"read_time":4},962084928904,"https://ap-avatar.wpscdn.com/davatar_155a257f0dc6eb9ab79c44ca47cae57d","| \u003Cbr>Are You Safe Yet? Safety Mechanism Insertion and Validation\u003Cbr>Ping Yeung, Jin Hou, Vinayak Desai, Jacob Wiltgen\u003Cbr>Mentor, A Siemens Business |\n| --- |\n| \u003Cbr>\u003Cbr>Abstract\u003Cbr>As functional safety becomes increasingly important intoday's industrial and automotive designs, many legacy designs have to be “upgraded” to meet the safety goal of the system. An efficient approach is to use safety synthesis and formal verification to incorporate a safety architecture into the design. The flow can consist of these major steps: 1) explore areas of the design where better fault detections are required, 2) introduce the right safety mechanisms into the design with safety synthesis, 3) validate the design changes with formal verification, and 4) perform formal fault injection to measure the diagnostic coverage.\u003Cbr>\u003Cbr>Safety Mechanisms Insertion\u003Cbr>Register-level safety mechanisms include:\u003Cbr>• Parity generation and checking for critical control elements.\u003Cbr>• Double modular redundancy for a selected list of registers.\u003Cbr>• Triple modular redundancy for a selected list of registers.\u003Cbr>• Error correction, and single-error correction with doubleerror detection for banks of registers.\u003Cbr>• Protocol checking ensures valid state transitions for finite state machines\u003Cbr>\u003Cbr>Module-level safety mechanisms include:\u003Cbr>• Double modular redundancy along with lockstep checker.\u003Cbr>• Triple modular redundancy along with lockstep checker and majority voting\u003Cbr>• Input and output parity checking on groups of interface signals\u003Cbr>• Memory parity generation and checking\u003Cbr>\u003Cbr>TEMPLATE DESIGN © 2008\u003Cbr>[www.PosterPresentations.com](www.PosterPresentations.com)\u003Cbr>\u003Cbr>\u003Cbr>Safety Mechanisms for a Safety-Critical Design\u003Cbr>\u003Cbr>A high-level architecture is shown. For the design interfaces, parity checks can be performed to ensure accurate data transmission between the interface modules and the interface controllers inside the design. Once the data are inside the design, they can be protected with data parity on the buses and error-correction code (ECC) in storage elements. Critical control components such as FSMs and arbitration logic will best be protected with triple module redundancy and majority voting. Central and embedded processors can be protected with double modular redundancy along with lockstep checkers.\u003Cbr>\u003Cbr>Sequential Logic Equivalence Checking (SLEC)\u003Cbr>\u003Cbr>SLEC can be used to verify:\u003Cbr>• Safety Mechanism Insertion, ensuring that the functionality of the original design is not changed by the addition of the safety mechanisms (SMs)\u003Cbr>• Safety Mechanism Operation, ensuring that the inserted functional safety mechanisms are working as designed.\u003Cbr>\u003Cbr>Safety Mechanism Insertion Verification\u003Cbr>\u003Cbr>A triple modular redundancy (TMR) is used as the safety mechanism to protect the design. By comparing Design A (without safety mechanism) and Design B (with TMR), SLEC can mathematically prove that the TMR has been correctly inserted into the design.\u003Cbr>\u003Cbr>\u003Cbr>Safety Mechanism Operation Verification\u003Cbr>\u003Cbr>A golden (no-fault) model and a fault injected model are used to perform on-the-fly fault injection and result analysis. By instantiating a design with a copy of itself, all legal input values are automatically specified for SLEC, just as a golden reference model in simulation predicts all expected outputs for any input stimulus. By comparing a fault injected design with a copy of itself without faults, the formal tool checks if there is any possible way for the fault to either escape to the outputs or go undetected by the safety mechanism.\u003Cbr>\u003Cbr>Implementation Environment\u003Cbr>\u003Cbr>The tool, Austemper Annealer [7], was used to perform safety synthesis by duplicating part of the design for double modular redundancy. The figure above shows the “safe” design and the setup of verifying the double modular redundancy safety mechanism using SLEC.\u003Cbr>The tool, Questa SLEC [8], was used for SLEC verification. We not only compare the outputs of the origi","cbCaiovxsi4rvXKH","https://ap.wps.com/l/cbCaiovxsi4rvXKH","pdf",802414,"English","# Safety Mechanism Insertion\n## Register-level safety mechanisms\n## Module-level safety mechanisms\n# Safety Mechanisms for a Safety-Critical Design\n## High-level architecture\n# Sequential Logic Equivalence Checking (SLEC)\n## Safety Mechanism Insertion\n## Safety Mechanism Operation\n# Implementation Environment\n# Results","[{\"question\":\"What major steps does the proposed verification flow follow?\",\"answer\":\"The flow explores where stronger fault detection is needed, inserts safety mechanisms via safety synthesis, validates changes using formal verification (SLEC), and performs formal fault injection to measure diagnostic coverage.\"},{\"question\":\"What kinds of register-level safety mechanisms are discussed?\",\"answer\":\"Register-level mechanisms include parity generation/checking, double or triple modular redundancy for selected register lists, error correction (including single-error correction with double-error detection for register banks), and protocol checking for valid FSM state transitions.\"},{\"question\":\"How does SLEC verify safety mechanism insertion and operation?\",\"answer\":\"For insertion, SLEC compares a design without safety mechanisms (A) to a design with TMR (B) to prove correct insertion. For operation, on-the-fly fault injection compares a fault-injected design against a fault-free copy to check whether faults can escape or remain undetected.\"}]","Are You Safe Yet - Safety Mechanism Insertion and Validation | PDF",1789145855]