[{"data":1,"prerenderedAt":-1},["ShallowReactive",2],{"detail-sidebar-cat-0-en-105":3,"doc-seo-343240-105":59,"doc-detail-343240-en":131},{"code":4,"msg":5,"data":6},0,"success",[7,13,18,23,28,33,38,43,48,51,55],{"id":8,"doc_module":4,"doc_module_name":9,"category_name":10,"show_sort_weight":11,"slug":12},1,"Document","Story & Novel",90,"story-novel",{"id":14,"doc_module":4,"doc_module_name":9,"category_name":15,"show_sort_weight":16,"slug":17},2,"Literature",80,"literature",{"id":19,"doc_module":4,"doc_module_name":9,"category_name":20,"show_sort_weight":21,"slug":22},4,"Exam",70,"exam",{"id":24,"doc_module":4,"doc_module_name":9,"category_name":25,"show_sort_weight":26,"slug":27},5,"Comic",60,"comic",{"id":29,"doc_module":4,"doc_module_name":9,"category_name":30,"show_sort_weight":31,"slug":32},6,"Technology",50,"technology",{"id":34,"doc_module":4,"doc_module_name":9,"category_name":35,"show_sort_weight":36,"slug":37},7,"Healthcare",40,"healthcare",{"id":39,"doc_module":4,"doc_module_name":9,"category_name":40,"show_sort_weight":41,"slug":42},8,"Research & Report",30,"research-report",{"id":44,"doc_module":4,"doc_module_name":9,"category_name":45,"show_sort_weight":46,"slug":47},9,"Religion & Spirituality",20,"religion-spirituality",{"id":46,"doc_module":4,"doc_module_name":9,"category_name":49,"show_sort_weight":46,"slug":50},"World Cup","world-cup",{"id":52,"doc_module":4,"doc_module_name":9,"category_name":53,"show_sort_weight":52,"slug":54},10,"Lifestyle","lifestyle",{"id":56,"doc_module":4,"doc_module_name":9,"category_name":57,"show_sort_weight":24,"slug":58},19,"General","general",{"code":4,"msg":60,"data":61},"ok",{"site_id":62,"language":63,"slug":64,"title":65,"keywords":66,"description":67,"schema_data":68,"social_meta":124,"head_meta":126,"extra_data":128,"updated_unix":130},105,"en","vesa-display-stream-compression-industry-standard-overview","VESA Display Stream Compression - Industry Standard Overview","","VESA Display Stream Compression (DSC) addresses bandwidth limits and power costs caused by higher-resolution displays and larger frame buffers in display driver ICs. Developed by VESA with the MIPI Alliance, DSC is an industry standard aimed at interoperable, visually lossless compression across display links. The whitepaper explains the underlying algorithm design choices and the key requirements DSC meets, including constant bit rate, independently decodable regions (slices), broad format support, and efficient real-time hardware implementation.",{"@graph":69,"@context":123},[70,84,106],{"@type":71,"itemListElement":72},"BreadcrumbList",[73,77,79,82],{"item":74,"name":75,"@type":76,"position":8},"https://docshare.wps.com","Home","ListItem",{"item":78,"name":9,"@type":76,"position":14},"https://docshare.wps.com/document/",{"item":80,"name":30,"@type":76,"position":81},"https://docshare.wps.com/document/technology/",3,{"item":83,"name":65,"@type":76,"position":19},"https://docshare.wps.com/document/vesa-display-stream-compression-industry-standard-overview/343240/",{"url":83,"name":65,"@type":85,"image":86,"author":91,"headline":65,"publisher":94,"fileFormat":97,"inLanguage":63,"description":67,"dateModified":98,"datePublished":99,"encodingFormat":97,"isAccessibleForFree":100,"interactionStatistic":101},"DigitalDocument",{"url":87,"@type":88,"width":89,"height":90},"https://docshare.wps.com/thumbnails/vesa-display-stream-compression-industry-standard-overview/343240.png","ImageObject",300,407,{"name":92,"@type":93},"Ben ","Person",{"url":74,"name":95,"@type":96},"DocShare","Organization","application/pdf","2026-10-29","2026-09-22",true,{"@type":102,"interactionType":103,"userInteractionCount":105},"InteractionCounter",{"@type":104},"ViewAction",14,{"@type":107,"mainEntity":108},"FAQPage",[109,115,119],{"name":110,"@type":111,"acceptedAnswer":112},"Why was Display Stream Compression (DSC) needed for higher-resolution displays?","Question",{"text":113,"@type":114},"Higher pixel counts increase bandwidth requirements, while physical layer advances and available link capacity often cannot keep up. Larger on-chip frame buffers in display driver ICs further increase the need for compression on display links.","Answer",{"name":116,"@type":111,"acceptedAnswer":117},"What were the core requirements DSC had to satisfy?",{"text":118,"@type":114},"DSC needed visually lossless picture quality, a constant compressed data rate down to low bit rates (e.g., 8 bits/pixel), independently decodable regions (slices), support for multiple color formats and bit depths, and real-time implementation feasibility on conventional hardware.",{"name":120,"@type":111,"acceptedAnswer":121},"How does the DSC encoding algorithm work at a high level?",{"text":122,"@type":114},"The DSC encoder uses delta pulse code modulation (DPCM) with an Indexed Color History (ICH). It performs color-space conversion (RGB to YCoCg-R1), prediction using supported modes, quantization via an efficient power-of-2 quantizer, and reconstruction by combining inverse-quantized residuals with predicted values while enforcing valid output ranges.","https://schema.org",{"og:url":83,"og:type":125,"og:title":65,"og:site_name":95,"og:description":67},"article",{"robots":127,"canonical":83},"index,follow",{"doc_id":129,"site_id":62},343240,1790376413,{"code":4,"msg":5,"data":132},{"doc_id":129,"user_id":133,"nickname":92,"user_avatar":134,"doc_module":4,"category_id":29,"category_name":30,"doc_title":65,"doc_description":67,"doc_content":135,"file_id":136,"file_url":137,"file_type":138,"file_size":139,"view_count":105,"is_deleted":4,"is_public":8,"is_downloadable":8,"audit_status":8,"page_count":24,"language":140,"language_code":63,"site_id":62,"html_lang":63,"table_of_contents":141,"faqs":142,"seo_title":143,"seo_description":67,"update_tm":144,"read_time":145},2336478951081,"https://ap-avatar.wpscdn.com/davatar_276721f389ce27ea32af1340a28f341c","VESA Display Stream Compression  \nWritten by Frederick Walls, Associate Technical Director, and Sandy MacInnis, Senior Technical Director, Broadcom Corporation (VESA member)  \nOVERVIEW  \nDisplay manufacturers are turning to higher-­‐resolution displays to differentiate their products. The increased pixel counts have required increased bandwidth over the links that drive these displays. However, advances in physical layer technology have not kept up with the increases in pixel counts. In addition, some display driver ICs store displayed frames, so higher-­‐resolution displays mean larger on-­‐chip frame buffers. These factors have created a need for compression on display links. The Video Electronics Standards Association (VESA ®), in liaison with the MIPI ® Alliance, has developed an industry standard (Display Stream Compression 1 .0 ) for interoperable, visually lossless compression over display links.  \nThis whitepaper discusses the challenges that high-­‐resolution displays present, the ways that the DSC algorithm uniquely addresses these challenges, and the methods that were used to achieve the desired picture quality.  \nBACKGROUND  \nDisplay links are everywhere, connecting computers to monitors, set-­‐top boxes to televisions, and application processors to display panels. With the successful marketing of very high pixel density displays, consumer demand for higher  \nresolutions has skyrocketed, which means that the amount of pixel data sent over display links has skyrocketed as well. Some links are simply not capable of handling the extra bandwidth, and those that are have become expensive and power-­‐hungry. Some display interfaces now support carrying multiple video streams, which also burdens the physical layer underlying these interfaces.  \nMany companies have tried to address these problems by introducing image compression on the pixel data. Unfortunately, these schemes are frequently not visually lossless, are poorly documented, or are difficult and expensive to implement in a conventional display device. Proprietary solutions run significant risks of not being interoperable. Source and display implementers typically pay a high development cost to implement a single compression scheme. Source implementers want their products to work with any display device, and implementing all possible proprietary compression schemes is simply impractical. And display implementers require compression that provides interoperability and excellent picture quality at a low cost.  \nIn late 2012, VESA recognized the need for an industry-­‐standard display stream compression specification and formed the Display Stream Compression (DSC) task group. The goal was to create a compression standard that display link standards could directly refer to, enabling source and display manufacturers to implement a single, well-­‐documented compression specification across all products and interfaces.  \nThe group issued a call for proposals in January, 2013, evaluated six different proposals, and selected the one that best met the requirements:  \n• The picture quality must be good enough that users cannot tell that the compression is active (i.e., visually lossless) .  \n• The compressed data rate should be constant, and the algorithm must be visually lossless at rates as low as 8 bits/pixel.  \n• Some applications require the ability to update small regions of the image, so the specification needs to support independently decodable regions (i.e., slices) .  \n• Many different video formats must be supported (RGB, YCbCr 4:2:2, or  \n4:4:4; 8, 10, or 12 bits/component) .  \n• The scheme must be easy and inexpensive to implement in real-­‐time using conventional hardware, and it should be possible to implement decoders using older technologies and process nodes.  \nExisting video compression standards do not meet these requirements. Transform-­‐based algorithms, such as MPEG-­‐2 and H.264, and wavelet-­‐based algorithms, such as JPEG-­‐2000 and VC-­‐2, require ","cbCaitzOGjsrEeW2","https://ap.wps.com/l/cbCaitzOGjsrEeW2","pdf",232669,"English","# Overview\n# Background\n# Algorithm Overview","[{\"question\":\"Why was Display Stream Compression (DSC) needed for higher-resolution displays?\",\"answer\":\"Higher pixel counts increase bandwidth requirements, while physical layer advances and available link capacity often cannot keep up. Larger on-chip frame buffers in display driver ICs further increase the need for compression on display links.\"},{\"question\":\"What were the core requirements DSC had to satisfy?\",\"answer\":\"DSC needed visually lossless picture quality, a constant compressed data rate down to low bit rates (e.g., 8 bits/pixel), independently decodable regions (slices), support for multiple color formats and bit depths, and real-time implementation feasibility on conventional hardware.\"},{\"question\":\"How does the DSC encoding algorithm work at a high level?\",\"answer\":\"The DSC encoder uses delta pulse code modulation (DPCM) with an Indexed Color History (ICH). It performs color-space conversion (RGB to YCoCg-R1), prediction using supported modes, quantization via an efficient power-of-2 quantizer, and reconstruction by combining inverse-quantized residuals with predicted values while enforcing valid output ranges.\"}]","VESA Display Stream Compression - Industry Standard Overview | PDF",1790050399,13]