[{"data":1,"prerenderedAt":-1},["ShallowReactive",2],{"doc-detail-81999-en":3,"doc-seo-81999-105":30,"detail-sidebar-cat-0-en-105":92},{"code":4,"msg":5,"data":6},0,"success",{"doc_id":7,"user_id":8,"nickname":9,"user_avatar":10,"doc_module":4,"category_id":11,"category_name":12,"doc_title":13,"doc_description":14,"doc_content":15,"file_id":16,"file_url":17,"file_type":18,"file_size":19,"view_count":20,"is_deleted":4,"is_public":21,"is_downloadable":21,"audit_status":21,"page_count":22,"language":23,"language_code":24,"site_id":25,"html_lang":24,"table_of_contents":26,"faqs":27,"seo_title":13,"seo_description":14,"update_tm":28,"read_time":29},81999,687197207639,"Asher","https://ap-avatar.wpscdn.com/davatar_a8503ba1806abce46bf441b54a3ca4cd",8,"Research & Report","Vectorizing Quantum Control: A RISC-V Vector Extension Architecture for Scalable Qubit Systems","Quantum Control Processor (QCP) connects compiler toolchains with control electronics by translating compiled quantum circuits into executable qubit-manipulation instructions and managing measurement feedback. Existing QCP designs largely depend on customized instruction sets, reducing reuse and increasing toolchain effort, while efficient qubit addressing and operation scheduling remain difficult at scale. This work proposes a vectorized quantum control approach based on RISC-V Vector (RVV) with a quantum extension, enabling up to 128 qubits per instruction and parameterized gate rotations. A hardware halt-resume protocol supports mid-circuit measurements and resumes pipeline execution within 80 ns, with up to 2.52× speedup and strong scalability validated via toolchains and FPGA prototypes.","Vectorizing Quantum Control: A RISC-V Vector Extension Architecture for Scalable Qubit Systems  \nXiaorang Guo∗ , 1 , Kun Qin∗ , 1 , 2 , Yanbin Chen3 , Carsten Trinitis 1 , 2 and Martin Schulz 1  \n1 Chair of Computer Architecture and Parallel Systems, Technical University of Munich, Garching, Germany  \n2 Chair of Computer Architecture and Operating Systems, Technical University of Munich, Heilbronn, Germany  \n3 Chair for Formal Languages, Compiler Construction, Software Construction, Technical University of Munich, Garching, Germany Email: {xiaorang.guo, kun.qin, yanbin.chen, carsten.trinitis, [martin.w.j.schulz](martin.w.j.schulz}@tum.de)[}](martin.w.j.schulz}@tum.de)[@tum.de](martin.w.j.schulz}@tum.de)  \narXiv :2607 .07372v 1 [ cs .AR] 8 Jul 2026  \nAbstract—The Quantum Control Processor (QCP) bridges the gap between compiler toolchains and control electronics, and is responsible for translating compiled quantum circuits into executable instructions that directly manipulate qubits and handle measurement feedback. However, existing designs rely primarily on customized instruction sets, limiting design reuse and requiring significant effort to build supporting toolchains. Furthermore, efficiently addressing qubits and scheduling operations in highly scalable scenarios remains a critical challenge. In this work, we present a vectorized quantum control approach built upon the RISC-V Vector (RVV) engine with a quantum-oriented extension. Leveraging the high parallelism of RVV, our approach can address up to 128 qubits in a single instruction. We also embed parameterized rotation information into the instruction set, enabling dynamic tuning of gate rotationsin hybrid quantum-classical programs. To support mid-circuit measurements, we design a hardware-based halt-resume protocol that resumes pipeline execution within 80 ns of receiving the measurement result. Comprehensive evaluation using both RISCV toolchains and FPGA prototypes demonstrates that our design achieves up to 2.52× speedup over the baseline in program execution time, with excellent scalability.  \nIndex Terms—Quantum Computing, Quantum Control Processor, Instruction Set Architecture, RISC-V, FPGA  \nI. INTRODUCTION  \nQuantum computing is moving from theoretical promise to physical realization, with leading modalities such as superconducting qubits [1], trapped ions [2], and neutral atoms [3] demonstrating qubit counts ranging from tens to thousands in recent years [4], [5] . Yet achieving practical quantum advantage requires more than physical-level improvements: it demands coordinating qubit manipulation at scale. This challenge falls primarily on the classical control hardware that drives the Quantum Processing Unit (QPU) . As qubit counts grow beyond a thousand toward Quantum Error Correction (QEC) applications, the classical control stack emerges asa critical scalability bottleneck that limits further system expansion.  \nA modern quantum computing stack is composed of heterogeneous layers: from high-level algorithms and compilers down to system control software, cryogenic electronics, and the physical quantum modality [6] . The classical control bottleneck primarily occurs at the system control software layer, where two demands grow simultaneously as systems  \n∗ Equal Contribution.  \nscale. First, as qubit counts increase, the control unit must issue gate operations to more qubits in parallel, placing evergreater scheduling pressure on the classical hardware. Second, the rise of hybrid quantum-classical algorithms, such as the Variational Quantum Eigensolver (VQE) [7] and the Quantum Approximate Optimization Algorithm (QAOA) [8], requires low-latency, feedback-driven execution, where measurement outcomes from the QPU must be processed by classical logic before the next operation is issued. In practice, end-to-end profiling of such workloads shows that total execution time is dominated not by quantum gate operations themselves, but by the round-trip communication betw","cbCaie8znAgmTb6M","https://ap.wps.com/l/cbCaie8znAgmTb6M","pdf",461922,7,1,11,"English","en",105,"# Introduction\n## Motivation: scalability and the classical control bottleneck\n## Prior QCP limitations\n## RISC-V and RVV as an enabling substrate\n# Vectorized Quantum Control Approach\n## Quantum-oriented RVV extension\n## Up to 128-qubit addressing per instruction\n## Parameterized rotations for hybrid programs\n# Mid-Circuit Measurements Support\n## Hardware halt-resume protocol\n## Resuming pipeline within 80 ns\n# Evaluation and Results\n## Toolchain validation and FPGA prototypes\n## Speedup and scalability","[{\"question\":\"What role does the Quantum Control Processor (QCP) play in the quantum computing stack?\",\"answer\":\"The QCP translates compiled quantum circuits into executable instructions that manipulate qubits and handles measurement feedback for subsequent control actions.\"},{\"question\":\"Why do prior QCP designs limit reuse and practical deployment?\",\"answer\":\"They rely mainly on customized instruction sets, which makes supporting toolchains costly to build and constrains access to mature compiler and verification infrastructure.\"},{\"question\":\"How does the proposed vectorized architecture support large-scale qubit systems and mid-circuit measurements?\",\"answer\":\"It builds a quantum-oriented extension on RISC-V Vector (RVV) to target up to 128 qubits in a single instruction and embeds parameterized rotation information; it also introduces a hardware-based halt-resume protocol that resumes pipeline execution within 80 ns after receiving measurement results.\"}]",1784177489,28,{"code":4,"msg":31,"data":32},"ok",{"site_id":25,"language":24,"slug":33,"title":13,"keywords":34,"description":14,"schema_data":35,"social_meta":87,"head_meta":89,"extra_data":91,"updated_unix":28},"vectorizing-quantum-control-a-risc-v-vector-extension-architecture-for-scalable-qubit-systems","",{"@graph":36,"@context":86},[37,54,69],{"@type":38,"itemListElement":39},"BreadcrumbList",[40,44,48,51],{"item":41,"name":42,"@type":43,"position":21},"https://docshare.wps.com","Home","ListItem",{"item":45,"name":46,"@type":43,"position":47},"https://docshare.wps.com/document/","Document",2,{"item":49,"name":12,"@type":43,"position":50},"https://docshare.wps.com/document/research-report/",3,{"item":52,"name":13,"@type":43,"position":53},"https://docshare.wps.com/document/vectorizing-quantum-control-a-risc-v-vector-extension-architecture-for-scalable-qubit-systems/81999/",4,{"url":52,"name":13,"@type":55,"author":56,"headline":13,"publisher":58,"fileFormat":61,"inLanguage":24,"description":14,"dateModified":62,"datePublished":63,"encodingFormat":61,"isAccessibleForFree":64,"interactionStatistic":65},"DigitalDocument",{"name":9,"@type":57},"Person",{"url":41,"name":59,"@type":60},"DocShare","Organization","application/pdf","2026-07-30","2026-07-16",true,{"@type":66,"interactionType":67,"userInteractionCount":20},"InteractionCounter",{"@type":68},"ViewAction",{"@type":70,"mainEntity":71},"FAQPage",[72,78,82],{"name":73,"@type":74,"acceptedAnswer":75},"What role does the Quantum Control Processor (QCP) play in the quantum computing stack?","Question",{"text":76,"@type":77},"The QCP translates compiled quantum circuits into executable instructions that manipulate qubits and handles measurement feedback for subsequent control actions.","Answer",{"name":79,"@type":74,"acceptedAnswer":80},"Why do prior QCP designs limit reuse and practical deployment?",{"text":81,"@type":77},"They rely mainly on customized instruction sets, which makes supporting toolchains costly to build and constrains access to mature compiler and verification infrastructure.",{"name":83,"@type":74,"acceptedAnswer":84},"How does the proposed vectorized architecture support large-scale qubit systems and mid-circuit measurements?",{"text":85,"@type":77},"It builds a quantum-oriented extension on RISC-V Vector (RVV) to target up to 128 qubits in a single instruction and embeds parameterized rotation information; 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