[{"data":1,"prerenderedAt":-1},["ShallowReactive",2],{"doc-seo-560836-105":3,"detail-sidebar-cat-0-en-105":81,"doc-detail-560836-en":130},{"code":4,"msg":5,"data":6},0,"ok",{"site_id":7,"language":8,"slug":9,"title":10,"keywords":11,"description":12,"schema_data":13,"social_meta":74,"head_meta":76,"extra_data":78,"updated_unix":80},105,"en","tda837x-family-i2c-bus-controlled-economy-palntsc-and-ntsc-tv-processors","TDA837x family - I2C-bus controlled economy PAL/NTSC and NTSC TV-processors","","TDA837x family TV processors are I2C-bus controlled single-chip solutions designed for PAL/NTSC (TDA8374, TDA8375) and NTSC (TDA8373, TDA8377) television receivers. The datasheet outlines key functional features including an IF vision amplifier, PLL demodulator, alignment-free sound and horizontal oscillation, chrominance trap and band-pass filters with auto-calibration, and integrated luminance timing. It compares economy versus mid/high-end versions, lists version-specific circuit differences in tables, and provides quick-reference electrical data such as supply, input sensitivities, and output signal levels, plus ordering/package information.",{"@graph":14,"@context":73},[15,34,56],{"@type":16,"itemListElement":17},"BreadcrumbList",[18,23,27,31],{"item":19,"name":20,"@type":21,"position":22},"https://docshare.wps.com","Home","ListItem",1,{"item":24,"name":25,"@type":21,"position":26},"https://docshare.wps.com/document/","Document",2,{"item":28,"name":29,"@type":21,"position":30},"https://docshare.wps.com/document/technology/","Technology",3,{"item":32,"name":10,"@type":21,"position":33},"https://docshare.wps.com/document/tda837x-family-i2c-bus-controlled-economy-palntsc-and-ntsc-tv-processors/560836/",4,{"url":32,"name":10,"@type":35,"image":36,"author":41,"headline":10,"publisher":44,"fileFormat":47,"inLanguage":8,"description":12,"dateModified":48,"datePublished":49,"encodingFormat":47,"isAccessibleForFree":50,"interactionStatistic":51},"DigitalDocument",{"url":37,"@type":38,"width":39,"height":40},"https://docshare.wps.com/thumbnails/tda837x-family-i2c-bus-controlled-economy-palntsc-and-ntsc-tv-processors/560836.png","ImageObject",300,407,{"name":42,"@type":43},"Nguyễn Văn Học","Person",{"url":19,"name":45,"@type":46},"DocShare","Organization","application/pdf","2026-10-19","2026-10-12",true,{"@type":52,"interactionType":53,"userInteractionCount":55},"InteractionCounter",{"@type":54},"ViewAction",6,{"@type":57,"mainEntity":58},"FAQPage",[59,65,69],{"name":60,"@type":61,"acceptedAnswer":62},"What televisions systems are supported by the TDA837x family, and which type numbers correspond to each standard?","Question",{"text":63,"@type":64},"TDA8374 and TDA8375 are intended for PAL/NTSC television receivers, while TDA8373 and TDA8377 are intended for NTSC television receivers.","Answer",{"name":66,"@type":61,"acceptedAnswer":67},"What main features distinguish the TDA837x TV processors?",{"text":68,"@type":64},"Key features include a vision IF amplifier with differential phase/gain suitability, a PLL IF demodulator, an alignment-free sound demodulator, flexible CVBS/Y-C source selection, integrated chrominance filtering with auto-calibration, and I2C-bus control of various functions.",{"name":70,"@type":61,"acceptedAnswer":71},"How do the economy and mid/high-end versions differ?",{"text":72,"@type":64},"The datasheet separates versions into economy receivers with basic functions and versions with additional functions such as E-W geometry control, horizontal/vertical zoom, and a YUV interface for 110° picture tubes.","https://schema.org",{"og:url":32,"og:type":75,"og:title":10,"og:site_name":45,"og:description":12},"article",{"robots":77,"canonical":32},"index,follow",{"doc_id":79,"site_id":7},560836,1791840735,{"code":4,"msg":82,"data":83},"success",[84,88,92,96,101,104,109,114,119,122,126],{"id":22,"doc_module":4,"doc_module_name":25,"category_name":85,"show_sort_weight":86,"slug":87},"Story & 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Spirituality",20,"religion-spirituality",{"id":117,"doc_module":4,"doc_module_name":25,"category_name":120,"show_sort_weight":117,"slug":121},"World Cup","world-cup",{"id":123,"doc_module":4,"doc_module_name":25,"category_name":124,"show_sort_weight":123,"slug":125},10,"Lifestyle","lifestyle",{"id":127,"doc_module":4,"doc_module_name":25,"category_name":128,"show_sort_weight":97,"slug":129},19,"General","general",{"code":4,"msg":82,"data":131},{"doc_id":79,"user_id":132,"nickname":42,"user_avatar":133,"doc_module":4,"category_id":55,"category_name":29,"doc_title":10,"doc_description":12,"doc_content":134,"file_id":135,"file_url":136,"file_type":137,"file_size":138,"view_count":55,"is_deleted":4,"is_public":22,"is_downloadable":22,"audit_status":22,"page_count":139,"language":140,"language_code":8,"site_id":7,"html_lang":8,"table_of_contents":141,"faqs":142,"seo_title":143,"seo_description":12,"update_tm":144,"read_time":145},1374402739827,"https://ap-avatar.wpscdn.com/avatar/14000c97e7351f1a627?x-image-process=image/resize,m_fixed,w_180,h_180&k=1787885694763230660","INTEGRATED CIRCUITS  \nDATA SHEET  \nTDA837x family  \nI2 C-bus controlled economy PAL/NTSC and NTSC TV-processors  \nPreliminary speciﬁcation 1997 Jul 01  \nFile under Integrated Circuits, IC02  \nI2C-bus controlled economy PAL/NTSC and NTSC TV-processors  \nTDA837x family  \nFEATURES  \nAvailable in all ICs:  \n• Vision IF amplifier with high sensitivity and good figures for differential phase and gain  \n• PLL demodulator for the IF signal  \n• Alignment-free sound demodulator  \n• Flexible source selection with a CVBS input for the internal signal and Y/C or CVBS input for the external signal  \n• Audio switch  \n• The output signal of the CVBS (Y/C) switch is externally available  \n• Integrated chrominance trap and band-pass filters (auto-calibrated)  \n• Luminance delay line integrated  \n• A symmetrical peaking circuit in the luminance channel  \n• Black stretching of non-standard CVBS or luminance signals  \n• RGB control circuit with black current stabilization and white point adjustment  \n• Linear RGB inputs and fast blanking  \n• Horizontal synchronization with two control loops and alignment-free horizontal oscillator  \n• Slow start and slow stop of the horizontal drive pulses  \n• Vertical count-down circuit  \n• Vertical driver optimized for DC-coupled vertical output stages  \n• I2C-bus control of various functions  \n• Low dissipation  \n• Small amount of peripheral components compared with competition ICs.  \nGENERAL DESCRIPTION  \nThe various versions of the TDA837x series are I2C-bus controlled single-chip TV processors which are intended tobe applied in PAL/NTSC (TDA8374 and TDA8375) and NTSC (TDA8373 and TDA8377) television receivers.  \nAll ICs are available in an SDIP56 package and some versions are also available in a QFP64 package. The ICs are pin compatible so that with one application board NTSC and PAL/NTSC (or multistandard together with the SECAM decoder TDA8395) receivers can be built. Functionally this IC series is split in to 2 categories:  \n• Versions intended to be used in economy TV receivers with all basic functions  \n• Versions with additional functions such as E-W geometry control, horizontal and vertical zoom function and YUV interface which are intended for TV receivers with 110° picture tubes.  \nThe various type numbers are given in Table 1 . The detailed differences between the various ICs are given in Table 2 .  \nTable 1 TV receiver versions  \n\n| TV RECEIVERS | SDIP56 PACKAGE |  | QFP64 PACKAGE |  |\n| --- | --- | --- | --- | --- |\n|  | ECONOMY | MID/HIGH END | ECONOMY | MID/HIGH END |\n| PAL only | TDA8374B | − | TDA8374BH | − |\n| PAL/NTSC (SECAM) | TDA8374 and TDA8374A | TDA8375 and TDA8375A | TDA8374AH | TDA8375AH |\n| NTSC | TDA8373 | TDA8377 and TDA8377A | − | − |\n\n1997 Jul 01 2  \nI2C-bus controlled economy PAL/NTSC and NTSC TV-processors  \nTDA837x family  \nTable 2 Differences between the various ICs  \n\n| CIRCUITS | IC VERSION (TDA) |  |  |  |  |  |  |  |\n| --- | --- | --- | --- | --- | --- | --- | --- | --- |\n|  | 8373 | 8374 | 8374A(H) | 8374B(H) | 8375 | 8375A(H) | 8377 | 8377A |\n| Multistandard IF | − | X | − | − | X | X | − | − |\n| Automatic Volume Levelling (AVL) | X | X | − | − | − | − | − | − |\n| PAL decoder | − | X | X | X | X | X | − | − |\n| SECAM interface | − | X | X | X | X | X | − | − |\n| NTSC decoder | X | X | X | X | X | X | X | X |\n| Colour matrix PAL/NTSC (Japan) | − | X | X | X | X | X | − | − |\n| Colour matrix NTSC (USA/Japan) | X | − | − | − | − | − | X | X |\n| YUV interface | − | − | − | − | X | X | X | X |\n| Horizontal geometry | − | − | − | − | X | X | X | X |\n| Horizontal and vertical zoom | − | − | − | − | X | X | X | X |\n\nQUICK REFERENCE DATA  \n\n| SYMBOL | PARAMETER | CONDITIONS | MIN. | TYP. | MAX. | UNIT |\n| --- | --- | --- | --- | --- | --- | --- |\n| Supplies |  |  |  |  |  |  |\n| VP | supply voltage |  | − | 8.0 | − | V |\n| IP | supply current |  | − | 110 | − | mA |\n| Input voltages |  |  |  |  |  |  |\n| V48,49(rms) | video IF ampliﬁers sensitivity (RMS value) |  | − | 70 | − |","cbCaibnuVqsQBzLJ","https://ap.wps.com/l/cbCaibnuVqsQBzLJ","pdf",496963,73,"English","# Features\n## General description\n## TV receiver versions (Table 1)\n## Differences between IC versions (Table 2)\n## Quick reference data\n## Ordering information","[{\"question\":\"What televisions systems are supported by the TDA837x family, and which type numbers correspond to each standard?\",\"answer\":\"TDA8374 and TDA8375 are intended for PAL/NTSC television receivers, while TDA8373 and TDA8377 are intended for NTSC television receivers.\"},{\"question\":\"What main features distinguish the TDA837x TV processors?\",\"answer\":\"Key features include a vision IF amplifier with differential phase/gain suitability, a PLL IF demodulator, an alignment-free sound demodulator, flexible CVBS/Y-C source selection, integrated chrominance filtering with auto-calibration, and I2C-bus control of various functions.\"},{\"question\":\"How do the economy and mid/high-end versions differ?\",\"answer\":\"The datasheet separates versions into economy receivers with basic functions and versions with additional functions such as E-W geometry control, horizontal/vertical zoom, and a YUV interface for 110° picture tubes.\"}]","TDA837x family - I2C-bus controlled economy PAL/NTSC and NTSC TV-processors | PDF",1791804251,184]