[{"data":1,"prerenderedAt":-1},["ShallowReactive",2],{"doc-seo-670851-105":3,"detail-sidebar-cat-0-en-105":80,"doc-detail-670851-en":130},{"code":4,"msg":5,"data":6},0,"ok",{"site_id":7,"language":8,"slug":9,"title":10,"keywords":11,"description":12,"schema_data":13,"social_meta":73,"head_meta":75,"extra_data":77,"updated_unix":79},105,"en","sn74als10-three-input-positive-nand-gates-logic-datasheet-package-options","SN74ALS10 - Three-Input Positive-NAND Gates Logic Datasheet - Package Options","","SN74ALS10A/ALS10 devices integrate three independent 3-input positive-NAND gates, providing positive-logic outputs where Y implements either A•B•C or A+B+C. The SN54ALS10A and SN54AS10 variants are specified for full military temperature operation from −55°C to 125°C, while SN74ALS10A and SN74AS10 operate from 0°C to 70°C. The document lists function truth tables, top-view pinouts for multiple packages (D, J, N, FK) and key electrical and switching characteristics, including absolute maximum ratings, recommended operating conditions, and timing parameters.",{"@graph":14,"@context":72},[15,34,55],{"@type":16,"itemListElement":17},"BreadcrumbList",[18,23,27,31],{"item":19,"name":20,"@type":21,"position":22},"https://docshare.wps.com","Home","ListItem",1,{"item":24,"name":25,"@type":21,"position":26},"https://docshare.wps.com/document/","Document",2,{"item":28,"name":29,"@type":21,"position":30},"https://docshare.wps.com/document/technology/","Technology",3,{"item":32,"name":10,"@type":21,"position":33},"https://docshare.wps.com/document/sn74als10-three-input-positive-nand-gates-logic-datasheet-package-options/670851/",4,{"url":32,"name":10,"@type":35,"image":36,"author":41,"headline":10,"publisher":44,"fileFormat":47,"inLanguage":8,"description":12,"dateModified":48,"datePublished":49,"encodingFormat":47,"isAccessibleForFree":50,"interactionStatistic":51},"DigitalDocument",{"url":37,"@type":38,"width":39,"height":40},"https://docshare.wps.com/thumbnails/sn74als10-three-input-positive-nand-gates-logic-datasheet-package-options/670851.png","ImageObject",300,407,{"name":42,"@type":43},"658056","Person",{"url":19,"name":45,"@type":46},"DocShare","Organization","application/pdf","2026-11-04","2026-11-01",true,{"@type":52,"interactionType":53,"userInteractionCount":26},"InteractionCounter",{"@type":54},"ViewAction",{"@type":56,"mainEntity":57},"FAQPage",[58,64,68],{"name":59,"@type":60,"acceptedAnswer":61},"What logic functions do the SN74ALS10 family gates implement?","Question",{"text":62,"@type":63},"Each device contains three independent 3-input positive-NAND gates. In positive logic, the output Y corresponds to either Y = A•B•C or Y = A + B + C depending on the described positive-logic formulation in the document.","Answer",{"name":65,"@type":60,"acceptedAnswer":66},"What are the operating temperature ranges for the SN54 and SN74 versions?",{"text":67,"@type":63},"The SN54ALS10A and SN54AS10 are specified over −55°C to 125°C. The SN74ALS10A and SN74AS10 are specified from 0°C to 70°C.",{"name":69,"@type":60,"acceptedAnswer":70},"Which package types are supported and how are pin numbers indicated?",{"text":71,"@type":63},"Package options include small-outline (D), ceramic chip carriers (FK), and standard plastic (N) and ceramic (J) 300-mil DIPs. The pin numbers shown correspond to the D, J, and N packages, with top-view diagrams provided for the listed package types.","https://schema.org",{"og:url":32,"og:type":74,"og:title":10,"og:site_name":45,"og:description":12},"article",{"robots":76,"canonical":32},"index,follow",{"doc_id":78,"site_id":7},670851,1793572041,{"code":4,"msg":81,"data":82},"success",[83,87,91,95,100,104,109,114,119,122,126],{"id":22,"doc_module":4,"doc_module_name":25,"category_name":84,"show_sort_weight":85,"slug":86},"Story & Novel",90,"story-novel",{"id":26,"doc_module":4,"doc_module_name":25,"category_name":88,"show_sort_weight":89,"slug":90},"Literature",80,"literature",{"id":33,"doc_module":4,"doc_module_name":25,"category_name":92,"show_sort_weight":93,"slug":94},"Exam",70,"exam",{"id":96,"doc_module":4,"doc_module_name":25,"category_name":97,"show_sort_weight":98,"slug":99},5,"Comic",60,"comic",{"id":101,"doc_module":4,"doc_module_name":25,"category_name":29,"show_sort_weight":102,"slug":103},6,50,"technology",{"id":105,"doc_module":4,"doc_module_name":25,"category_name":106,"show_sort_weight":107,"slug":108},7,"Healthcare",40,"healthcare",{"id":110,"doc_module":4,"doc_module_name":25,"category_name":111,"show_sort_weight":112,"slug":113},8,"Research & Report",30,"research-report",{"id":115,"doc_module":4,"doc_module_name":25,"category_name":116,"show_sort_weight":117,"slug":118},9,"Religion & Spirituality",20,"religion-spirituality",{"id":117,"doc_module":4,"doc_module_name":25,"category_name":120,"show_sort_weight":117,"slug":121},"World Cup","world-cup",{"id":123,"doc_module":4,"doc_module_name":25,"category_name":124,"show_sort_weight":123,"slug":125},10,"Lifestyle","lifestyle",{"id":127,"doc_module":4,"doc_module_name":25,"category_name":128,"show_sort_weight":96,"slug":129},19,"General","general",{"code":4,"msg":81,"data":131},{"doc_id":78,"user_id":132,"nickname":42,"user_avatar":11,"doc_module":4,"category_id":101,"category_name":29,"doc_title":10,"doc_description":12,"doc_content":133,"file_id":134,"file_url":135,"file_type":136,"file_size":137,"view_count":26,"is_deleted":4,"is_public":22,"is_downloadable":22,"audit_status":22,"page_count":138,"language":139,"language_code":8,"site_id":7,"html_lang":8,"table_of_contents":140,"faqs":141,"seo_title":142,"seo_description":12,"update_tm":79,"read_time":143},658056,"􀀁􀀂􀀃􀀄􀀅􀀆􀀁􀀇􀀈􀀅􀀉 􀀁􀀂􀀃􀀄􀀅􀀁􀀇􀀈􀀉 􀀁􀀂􀀋􀀄􀀅􀀆􀀁􀀇􀀈􀀅􀀉 􀀁􀀂􀀋􀀄􀀅􀀁􀀇􀀈􀀌􀀍􀀎􀀏􀀆􀀐 􀀑􀀒􀀎􀀂􀀏􀀓􀀌 􀀏􀀔􀀁􀀎􀀌􀀎􀀕􀀐􀀒􀀂􀀅􀀂􀀖 􀀗􀀅􀀌􀀐􀀁  \nSDAS002B − MARCH 1984 − REVISED DECEMBER 1994  \n• Package Options Include Plastic  \nSmall-Outline (D) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs  \ndescription  \nThese devices contain three independent 3-input positive-NAND gates.  They perform the Boolean functions Y = A • B • C or Y = A + B + C in positive logic.  \nThe SN54ALS10A and SN54AS10 are characterized for operation over the full military temperature range of −55°C to 125°C. The SN74ALS10A and SN74AS10 are characterized for operation from 0°C to 70°C.  \nFUNCTION TABLE  \n(each gate)  \n\n| INPUTS |  |  | OUTPUT\u003Cbr>Y |\n| --- | --- | --- | --- |\n| A B C |  |  |  |\n| H | H | H | L |\n| L | X | X | H |\n| X | L | X | H |\n| X | X | L | H |\n\nSN54ALS10A, SN54AS10 . . . J PACKAGESN74ALS10A, SN74AS10 . . . D OR N PACKAGE  \n(TOP VIEW)  \nSN54ALS10A, SN54AS10 . . . FK PACKAGE  \n(TOP VIEW)  \n1B  \n1A  \nNC  \nV CC  \n1C  \n2A  \nNC  \n2B  \nNC  \n2C  \n\n| | 3 2 1 20 19\u003Cbr>4 18 5 17 6 16\u003Cbr>7 15 8 14\u003Cbr>9 10 11 12 13\u003Cbr>\u003Cbr>|\n| --- | --- |\n\n1Y  \nNC  \n3C  \nNC  \n3B  \nNC − No internal connection  \n2Y  \nGND  \nNC  \n3Y  \n3A  \nlogic symbol† logic diagram (positive logic)  \n1A  \n1B  \n1C  \n2A  \n2B  \n2C  \n3A  \n3B  \n3C  \n&  \n1  \n\n| 2 |\n| --- |\n| 13 |\n| 3 |\n| 4 |\n| 5 |\n| 9 |\n| 10 |\n\n11  \n12  \n| 6\u003Cbr>|\n| --- |\n| 8\u003Cbr>|\n\n1Y  \n2Y  \n3Y  \n1A  \n1B  \n1C  \n2A  \n2B  \n2C  \n3A  \n3B  \n3C  \n1  \n2  \n\n| 13  |  |\n| --- | --- |\n| 3 |  |\n| 4 |  |\n| 5 \u003Cbr>9\u003Cbr>10 |  |\n| 11  |  |\n\n† This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.  \nPin numbers shown are for the D, J, and N packages.  \n1Y  \n2Y  \n3Y  \n􀀏􀀍􀀔􀀖􀀓􀀘􀀌􀀎􀀔􀀂 􀀖􀀅􀀌􀀅 􀀙􀀚􀀛􀀜􀀝􀀞 !􀀙􀀜􀀚 􀀙\" \\#$􀀝􀀝%􀀚! \" 􀀜􀀛 &$'(􀀙\\# !􀀙􀀜􀀚 ) !%*􀀏􀀝􀀜)$\\#!\" \\#􀀜􀀚􀀛􀀜􀀝􀀞 !􀀜 \"&%\\#􀀙􀀛􀀙\\# !􀀙􀀜􀀚\" &%􀀝 !+% !%􀀝􀀞\" 􀀜􀀛 􀀌%, \" 􀀎􀀚\"!􀀝$􀀞%􀀚!\"\"! 􀀚) 􀀝) - 􀀝􀀝 􀀚!.* 􀀏􀀝􀀜)$\\#!􀀙􀀜􀀚 &􀀝􀀜\\#%\"\"􀀙􀀚/ )􀀜%\" 􀀚􀀜! 􀀚%\\#%\"\" 􀀝􀀙(. 􀀙􀀚\\#($)%!%\"!􀀙􀀚/ 􀀜􀀛 (( & 􀀝 􀀞%!%􀀝\"*  \n Copyright 􀀁 1994, Texas Instruments Incorporated  \nPOST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1  \nPOST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443  \n􀀁􀀂􀀃􀀄􀀅􀀆􀀁􀀇􀀈􀀅􀀉 􀀁􀀂􀀃􀀄􀀅􀀁􀀇􀀈􀀉 􀀁􀀂􀀋􀀄􀀅􀀆􀀁􀀇􀀈􀀅􀀉 􀀁􀀂􀀋􀀄􀀅􀀁􀀇􀀈􀀌􀀍􀀎􀀏􀀆􀀐 􀀑􀀒􀀎􀀂􀀏􀀓􀀌 􀀏􀀔􀀁􀀎􀀌􀀎􀀕􀀐􀀒􀀂􀀅􀀂􀀖 􀀗􀀅􀀌􀀐􀀁  \nSDAS002B − MARCH 1984 − REVISED DECEMBER 1994  \nabsolute maximum ratings over operating free-air temperature range (unless otherwise noted)†  \nSupply voltage, V CC ........................................................................ 7 V  \nInput voltage, VI ............................................................................ 7 V  \nOperating free-air temperature range, TA: SN54ALS10A .............................. −55°C to 125°C  \nSN74ALS10A ................................. 0°C to 70°C  \nStorage temperature range ........................................................ −65°C to 150°C  \n† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  \nfunctional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  \nrecommended operating conditions  \n\n|  | SN54ALS10A | SN74ALS10A | UNIT |\n| --- | --- | --- | --- |\n|  | MIN NOM MAX | MIN NOM MAX |  |\n| V CC Supply voltage | 4.5 5 5.5 | 4.5 5 5.5 | V |\n| VIH High-level input voltage | 2 | 2 | V |\n| VIL Low-level input voltage | 0.8‡ | 0.8 | V |\n|  | 0.7§ |  |  |\n| I OH High-level output current | −0.4 | −0.4 | mA |\n| I OL Low-level output current | 4 | 8 | mA |\n| TA Operating free-air temperature | −55 125 | 0 70 | °C |\n\n‡Applies over temperature range − 55°C to 70°C  \n§ Applies over temperature range 70°C to 125°C  \nelectrical characteristics over recommended operating free-air temperature range (unless otherwise noted)  \n\n| PARAMETER | TEST CONDITIONS |  | SN54ALS10A | SN74ALS10A | UNIT |\n| --- | --- | --- | --- | --- | --- |\n|  |  |  | MIN TYP¶ MAX | MIN TYP¶ MAX |  |\n| VIK | V CC = 4.5 V, II = −18","cbCaioYQWAAYLP38","https://ap.wps.com/l/cbCaioYQWAAYLP38","pdf",1311047,22,"English","# Device overview\n## Functional description and logic operation\n## Function table\n# Packaging and pin configuration\n## Package options and top views\n## Pin assignments and logic symbol\n# Electrical and timing specifications\n## Absolute maximum ratings\n## Recommended operating conditions\n## Electrical characteristics\n## Switching characteristics","[{\"question\":\"What logic functions do the SN74ALS10 family gates implement?\",\"answer\":\"Each device contains three independent 3-input positive-NAND gates. In positive logic, the output Y corresponds to either Y = A•B•C or Y = A + B + C depending on the described positive-logic formulation in the document.\"},{\"question\":\"What are the operating temperature ranges for the SN54 and SN74 versions?\",\"answer\":\"The SN54ALS10A and SN54AS10 are specified over −55°C to 125°C. The SN74ALS10A and SN74AS10 are specified from 0°C to 70°C.\"},{\"question\":\"Which package types are supported and how are pin numbers indicated?\",\"answer\":\"Package options include small-outline (D), ceramic chip carriers (FK), and standard plastic (N) and ceramic (J) 300-mil DIPs. The pin numbers shown correspond to the D, J, and N packages, with top-view diagrams provided for the listed package types.\"}]","SN74ALS10 - Three-Input Positive-NAND Gates Logic Datasheet - Package Options | PDF",55]