[{"data":1,"prerenderedAt":-1},["ShallowReactive",2],{"doc-detail-125015-en":3,"doc-seo-125015-105":30,"detail-sidebar-cat-0-en-105":91},{"code":4,"msg":5,"data":6},0,"success",{"doc_id":7,"user_id":8,"nickname":9,"user_avatar":10,"doc_module":4,"category_id":11,"category_name":12,"doc_title":13,"doc_description":14,"doc_content":15,"file_id":16,"file_url":17,"file_type":18,"file_size":19,"view_count":4,"is_deleted":4,"is_public":20,"is_downloadable":20,"audit_status":20,"page_count":21,"language":22,"language_code":23,"site_id":24,"html_lang":23,"table_of_contents":25,"faqs":26,"seo_title":27,"seo_description":14,"update_tm":28,"read_time":29},125015,8796095461564,"Liam","https://ap-avatar.wpscdn.com/davatar_155a257f0dc6eb9ab79c44ca47cae57d",8,"Research & Report","SCART - Predicting STT-RAM Cache Retention Times Using Machine Learning","SCART addresses the need to tailor STT-RAM cache retention time to application-specific cache block lifetimes while minimizing the exploration overhead caused by emerging STT-RAM caches. The work proposes an STT-RAM Cache Retention Time (SCART) model that uses machine learning and easily obtainable statistics, such as SRAM characteristics, to predict right-provisioned retention times for latency or energy optimization. Experiments show an average 20.34% latency reduction and 29.12% energy reduction versus a homogeneous retention time, while cutting exploration overheads by 52.58% compared with prior work.","SCART: Predicting STT-RAM Cache Retention Times Using Machine Learning  \nDhruv Gajaria, Kyle Kuan, and Tosiron Adegbija  \nDepartment of Electrical & Computer Engineering  \nUniversity of Arizona, Tucson, AZ, USA  \nEmail: {dhruvgajaria, ckkuan, [tosiron](tosiron}@email.arizona.edu)[}](tosiron}@email.arizona.edu)[@email.arizona.edu](tosiron}@email.arizona.edu)  \narXiv :2407 . 19604v1 [ cs .CY] 28 Jul 2024  \nAbstract—Prior studies have shown that the retention time of the non-volatile spin-transfer torque RAM (STT-RAM) can be relaxed in order to reduce STT-RAM’s write energy and latency. However, since different applications may require different retention times, STT-RAM retention times must be critically explored to satisfy various applications’ needs. This process can be challenging due to exploration overhead, and exacerbated by the fact that STT-RAM caches are emerging and are not readily available for design time exploration. This paper explores using known and easily obtainable statistics (e.g., SRAM statistics) to predict the appropriate STT-RAM retention times, in order to minimize exploration overhead. We propose an STT-RAM Cache Retention Time (SCART) model, which utilizes machine learning to enable design time or runtime prediction of right-provisioned STT-RAM retention times for latency or energy optimization. Experimental results show that, on average, SCART can reduce the latency and energy by 20.34% and 29.12%, respectively, compared to a homogeneous retention time while reducing the exploration overheads by 52.58% compared to prior work.  \nIndex Terms—Spin-Transfer Torque RAM (STT-RAM) cache, configurable memory, low-power embedded systems, adaptable hardware, retention time.  \nI. INTRODUCTION  \nSpin-transfer torque RAM (STT-RAM) has emerged asa popular alternative to SRAM for implementing caches. STT-RAMs offer several benefits, such as high density, low leakage power, compatibility with CMOS, high endurance, etc. However, STT-RAMs suffer from high write latency and write energy, which may impede their widespread adoption in state-of-the-art resource-constrained systems. A promising optimization involves relaxing STT-RAM’s retention time—the duration for which data is retained in the absence of power—from the intrinsic duration, which could be up to 10 years [1] . Reducing the retention time offers much promise for latency and energy improvements because the long write latency and high write dynamic energy directly result from the long retention times of a non-volatile STT-RAM [1] . Thus, prior works [2], [1], [3], [4] have studied the benefits of reducing/relaxing the retention times, especially in caches since cache data blocks are usually only needed in the cache for short periods of time (typically less than 1 second) .  \nGiven a relaxed retention STT-RAM cache (hereafter referred to simply as STT-RAM cache), prior work has shown that different applications may require different retention times. An application’s retention time requirements are dictated by its cache block lifetimes, i.e., how long the blocks  \nmust remain in the cache. To yield maximal benefits from STT-RAM caches, the retention time must be specialized to the needs of the executing applications or application domains. If the retention times are not specialized, they maybe over-provisioned, thus wasting energy/latency, or underprovisioned, thus requiring additional schemes (e.g., the dynamic refresh scheme [3]) to maintain data integrity after the retention time elapses. Both cases accrue overheads that may substantially limit optimization potential [4, 2] .  \nTo enable right-provisioned retention times for STT-RAM caches, the retention times must be critically explored for different applications and metrics (e.g., energy, latency) . An exhaustive exploration of retention times is a challenging task, given that a wide variety of applications, application characteristics (e.g., read/write behaviors, cache block characteristics), and objective fu","cbCaiddNmIMjxfJ0","https://ap.wps.com/l/cbCaiddNmIMjxfJ0","pdf",1586390,1,7,"English","en",105,"# Abstract\n# Introduction\n## Background on STT-RAM caches\n## Retention-time specialization challenges\n## Proposed SCART approach and motivation","[{\"question\":\"What problem does SCART target in STT-RAM cache design?\",\"answer\":\"SCART targets the challenge of selecting retention times for STT-RAM caches that match different applications’ cache block lifetimes without incurring heavy exploration overhead.\"},{\"question\":\"How does SCART predict retention time for STT-RAM caches?\",\"answer\":\"SCART uses machine learning with easily obtainable statistics (e.g., SRAM statistics) to predict right-provisioned STT-RAM retention times for latency or energy optimization.\"},{\"question\":\"What performance improvements does SCART achieve?\",\"answer\":\"On average, SCART reduces latency by 20.34% and energy by 29.12% compared with a homogeneous retention time, and reduces exploration overheads by 52.58% versus prior work.\"}]","SCART - Predicting STT-RAM Cache Retention Times Using Machine Learning | PDF",1785896143,18,{"code":4,"msg":31,"data":32},"ok",{"site_id":24,"language":23,"slug":33,"title":13,"keywords":34,"description":14,"schema_data":35,"social_meta":86,"head_meta":88,"extra_data":90,"updated_unix":28},"scart-predicting-stt-ram-cache-retention-times-using-machine-learning","",{"@graph":36,"@context":85},[37,54,68],{"@type":38,"itemListElement":39},"BreadcrumbList",[40,44,48,51],{"item":41,"name":42,"@type":43,"position":20},"https://docshare.wps.com","Home","ListItem",{"item":45,"name":46,"@type":43,"position":47},"https://docshare.wps.com/document/","Document",2,{"item":49,"name":12,"@type":43,"position":50},"https://docshare.wps.com/document/research-report/",3,{"item":52,"name":13,"@type":43,"position":53},"https://docshare.wps.com/document/scart-predicting-stt-ram-cache-retention-times-using-machine-learning/125015/",4,{"url":52,"name":13,"@type":55,"author":56,"headline":13,"publisher":58,"fileFormat":61,"inLanguage":23,"description":14,"dateModified":62,"datePublished":62,"encodingFormat":61,"isAccessibleForFree":63,"interactionStatistic":64},"DigitalDocument",{"name":9,"@type":57},"Person",{"url":41,"name":59,"@type":60},"DocShare","Organization","application/pdf","2026-08-05",true,{"@type":65,"interactionType":66,"userInteractionCount":4},"InteractionCounter",{"@type":67},"ViewAction",{"@type":69,"mainEntity":70},"FAQPage",[71,77,81],{"name":72,"@type":73,"acceptedAnswer":74},"What problem does SCART target in STT-RAM cache design?","Question",{"text":75,"@type":76},"SCART targets the challenge of selecting retention times for STT-RAM caches that match different applications’ cache block lifetimes without incurring heavy exploration overhead.","Answer",{"name":78,"@type":73,"acceptedAnswer":79},"How does SCART predict retention time for STT-RAM caches?",{"text":80,"@type":76},"SCART uses machine learning with easily obtainable statistics (e.g., SRAM statistics) to predict right-provisioned STT-RAM retention times for latency or energy optimization.",{"name":82,"@type":73,"acceptedAnswer":83},"What performance improvements does SCART achieve?",{"text":84,"@type":76},"On average, SCART reduces latency by 20.34% and energy by 29.12% compared with a homogeneous retention time, and reduces exploration overheads by 52.58% versus prior work.","https://schema.org",{"og:url":52,"og:type":87,"og:title":13,"og:site_name":59,"og:description":14},"article",{"robots":89,"canonical":52},"index,follow",{"doc_id":7,"site_id":24},{"code":4,"msg":5,"data":92},[93,97,101,105,110,115,119,122,127,130,134],{"id":20,"doc_module":4,"doc_module_name":46,"category_name":94,"show_sort_weight":95,"slug":96},"Story & Novel",90,"story-novel",{"id":47,"doc_module":4,"doc_module_name":46,"category_name":98,"show_sort_weight":99,"slug":100},"Literature",80,"literature",{"id":53,"doc_module":4,"doc_module_name":46,"category_name":102,"show_sort_weight":103,"slug":104},"Exam",70,"exam",{"id":106,"doc_module":4,"doc_module_name":46,"category_name":107,"show_sort_weight":108,"slug":109},5,"Comic",60,"comic",{"id":111,"doc_module":4,"doc_module_name":46,"category_name":112,"show_sort_weight":113,"slug":114},6,"Technology",50,"technology",{"id":21,"doc_module":4,"doc_module_name":46,"category_name":116,"show_sort_weight":117,"slug":118},"Healthcare",40,"healthcare",{"id":11,"doc_module":4,"doc_module_name":46,"category_name":12,"show_sort_weight":120,"slug":121},30,"research-report",{"id":123,"doc_module":4,"doc_module_name":46,"category_name":124,"show_sort_weight":125,"slug":126},9,"Religion & Spirituality",20,"religion-spirituality",{"id":125,"doc_module":4,"doc_module_name":46,"category_name":128,"show_sort_weight":125,"slug":129},"World Cup","world-cup",{"id":131,"doc_module":4,"doc_module_name":46,"category_name":132,"show_sort_weight":131,"slug":133},10,"Lifestyle","lifestyle",{"id":135,"doc_module":4,"doc_module_name":46,"category_name":136,"show_sort_weight":106,"slug":137},19,"General","general"]