[{"data":1,"prerenderedAt":-1},["ShallowReactive",2],{"doc-detail-85615-en":3,"doc-seo-85615-105":30,"detail-sidebar-cat-0-en-105":91},{"code":4,"msg":5,"data":6},0,"success",{"doc_id":7,"user_id":8,"nickname":9,"user_avatar":10,"doc_module":4,"category_id":11,"category_name":12,"doc_title":13,"doc_description":14,"doc_content":15,"file_id":16,"file_url":17,"file_type":18,"file_size":19,"view_count":20,"is_deleted":4,"is_public":21,"is_downloadable":21,"audit_status":21,"page_count":22,"language":23,"language_code":24,"site_id":25,"html_lang":24,"table_of_contents":26,"faqs":27,"seo_title":13,"seo_description":14,"update_tm":28,"read_time":29},85615,3848291630094,"Emma Wilson","https://eur-avatar.wpscdn.com/davatar_085a072bc5b1113ac321206ff7593b45",8,"Research & Report","On GPU Implementation for Multi-Precision Integer Division","This paper studies efficient implementation of fast integer division on general-purpose GPUs, focusing on a Newton-iteration method based on a shifted-inverse operation. The approach keeps computations entirely in the integer domain and uses data-parallel operators such as multi-precision multiplication, addition, subtraction, comparison, and shifts. The work delivers a CUDA implementation for integer precisions from 215 to 218 bits, includes algorithmic refinements, and proposes a multiplication-focused cost model with evaluation showing near-optimal performance.","arXiv :2606 .06386v2 [ cs .DC] 11 Jul 2026  \nOn GPU Implementation for Multi-Precision Integer Division  \nMartin B. Marchioro 1 , Aske N. Raahauge 1 , Marc I. Løvenskjold 1 , Cosmin E. Oancea 1 , and Stephen M. Watt2  \n1 DIKU, University of Copenhagen, Copenhagen 2100, Denmark  \n[martin.marchioro@gmail.com](martin.marchioro@gmail.com) , [aske.n.r@di.ku.dk](aske.n.r@di.ku.dk) ,  \n[Marc.ivan95@gmail.com](Marc.ivan95@gmail.com) , [cosmin.oancea@di.ku.dk](cosmin.oancea@di.ku.dk) [0000−0001−5421−6876]  \n2 Cheriton School of Computer Science, University of Waterloo, Canada  \n[smwatt@uwaterloo.ca](smwatt@uwaterloo.ca) [0000−0001−8303−4983]  \nAbstract. This paper presents the issues arising in implementing a fast integer division algorithm on general purpose GPUs. The algorithm uses a Newton iteration based on the shifted inverse operation, keeping all arithmetic in the integer domain and relying on data-parallel operators.  \nThe principal contribution is an efficient GPU/cuda implementation for integer precisions from 215 to 218 – sizes not supported by cgbn division.  \nWe propose algorithmic refinements, define a cost model in terms of multiplications, build on prefix sums and previous work on multi-precision multiplication, and present an evaluation showing near-optimal performance relative to the model for the target precision.  \nKeywords: Big integer arithmetic · cuda · Data-parallel programming  \n· GPGPU · High-level parallel languages · High-performance computing  \n1 Introduction  \nMulti-precision integer arithmetic is a basic component of computer algebra, cryptography, exact scientific computation, and symbolic-numeric software. Its performance matters not only for isolated large computations, but also for applications that require many independent integer operations at the same precision. This makes GPUs attractive: they offer high arithmetic throughput and massive parallelism, provided that the computation can be organized to keep data movement and inter-thread communication under control.  \nExisting GPU support for multi-precision integers is strongest at relatively small precisions, where one arithmetic instance can be mapped to a small cooperative group of threads. The nvidia cgbn library (Cooperative Groups Big Numbers) is an important example of this approach [29] . Such libraries provide very high performance in their intended range, but they do not cover all practically interesting sizes. In particular, there is a middle range of integer precisions—large enough that warp-level methods become strained, but still small enough that a complete arithmetic instance can fit within the fast memories of a single GPU thread block. This paper is concerned with this midsize regime.  \n2 Marchioro, Raahauge, Løvenskjold, Oancea, Watt  \nIn previous work we studied GPU implementations of multi-precision addition and multiplication in this regime [32] . That work showed that the classical algorithms, when scheduled carefully, can be made effective on GPUs by assigning one multi-precision operation to a cuda block, keeping operands and intermediate values in registers or shared memory, and minimizing global-memory traffic. It also showed that such algorithms can be expressed in a high-level data-parallel language such as Futhark, although some low-level transformations needed for peak performance remain beyond the current compiler.  \nDivision is a more demanding operation. It is not a simple local operation on digits, and the usual high-performance approach is to reduce division to multiplication by first computing an approximation to the reciprocal of the divisor. In conventional Newton iteration this typically requires working in a domain where such reciprocals exist, which can introduce multiple precision floating-point approximations and interactions between different arithmetic domains. For exact integer arithmetic this is undesirable: the implementation must preserve exactness while still exposing enough parallelism for the GPU.","cbCaifXGjYyeiP6V","https://ap.wps.com/l/cbCaifXGjYyeiP6V","pdf",699299,4,1,21,"English","en",105,"# Introduction\n## Multi-precision integers and GPU motivation\n## Existing GPU support and the midsize precision regime\n## Shifted-inverse division and implementation challenges\n## Paper contributions and scope","[{\"question\":\"What division approach does the paper use on GPUs?\",\"answer\":\"It uses a Newton iteration formulated from a whole shifted inverse rather than a reciprocal, enabling arithmetic to remain in the integer domain while using data-parallel operators.\"},{\"question\":\"What precisions does the proposed CUDA implementation target?\",\"answer\":\"The implementation targets integer precisions from 215 to 218 bits, specifically addressing sizes that are not supported by the cgbn division library approach.\"},{\"question\":\"What implementation refinements are highlighted for correctness on unsigned integers?\",\"answer\":\"The paper describes explicit sign handling in close-product computation and quotient correction to address cases where the shifted inverse may overestimate by one.\"}]",1784204938,53,{"code":4,"msg":31,"data":32},"ok",{"site_id":25,"language":24,"slug":33,"title":13,"keywords":34,"description":14,"schema_data":35,"social_meta":86,"head_meta":88,"extra_data":90,"updated_unix":28},"on-gpu-implementation-for-multi-precision-integer-division","",{"@graph":36,"@context":85},[37,53,68],{"@type":38,"itemListElement":39},"BreadcrumbList",[40,44,48,51],{"item":41,"name":42,"@type":43,"position":21},"https://docshare.wps.com","Home","ListItem",{"item":45,"name":46,"@type":43,"position":47},"https://docshare.wps.com/document/","Document",2,{"item":49,"name":12,"@type":43,"position":50},"https://docshare.wps.com/document/research-report/",3,{"item":52,"name":13,"@type":43,"position":20},"https://docshare.wps.com/document/on-gpu-implementation-for-multi-precision-integer-division/85615/",{"url":52,"name":13,"@type":54,"author":55,"headline":13,"publisher":57,"fileFormat":60,"inLanguage":24,"description":14,"dateModified":61,"datePublished":62,"encodingFormat":60,"isAccessibleForFree":63,"interactionStatistic":64},"DigitalDocument",{"name":9,"@type":56},"Person",{"url":41,"name":58,"@type":59},"DocShare","Organization","application/pdf","2026-07-25","2026-07-16",true,{"@type":65,"interactionType":66,"userInteractionCount":20},"InteractionCounter",{"@type":67},"ViewAction",{"@type":69,"mainEntity":70},"FAQPage",[71,77,81],{"name":72,"@type":73,"acceptedAnswer":74},"What division approach does the paper use on GPUs?","Question",{"text":75,"@type":76},"It uses a Newton iteration formulated from a whole shifted inverse rather than a reciprocal, enabling arithmetic to remain in the integer domain while using data-parallel operators.","Answer",{"name":78,"@type":73,"acceptedAnswer":79},"What precisions does the proposed CUDA implementation target?",{"text":80,"@type":76},"The implementation targets integer precisions from 215 to 218 bits, specifically addressing sizes that are not supported by the cgbn division library approach.",{"name":82,"@type":73,"acceptedAnswer":83},"What implementation refinements are highlighted for correctness on unsigned integers?",{"text":84,"@type":76},"The paper describes explicit sign handling in close-product computation and quotient correction to address cases where the shifted inverse may overestimate by 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