[{"data":1,"prerenderedAt":-1},["ShallowReactive",2],{"doc-detail-81987-en":3,"doc-seo-81987-105":30,"detail-sidebar-cat-0-en-105":92},{"code":4,"msg":5,"data":6},0,"success",{"doc_id":7,"user_id":8,"nickname":9,"user_avatar":10,"doc_module":4,"category_id":11,"category_name":12,"doc_title":13,"doc_description":14,"doc_content":15,"file_id":16,"file_url":17,"file_type":18,"file_size":19,"view_count":20,"is_deleted":4,"is_public":21,"is_downloadable":21,"audit_status":21,"page_count":22,"language":23,"language_code":24,"site_id":25,"html_lang":24,"table_of_contents":26,"faqs":27,"seo_title":13,"seo_description":14,"update_tm":28,"read_time":29},81987,687197207639,"Asher","https://ap-avatar.wpscdn.com/davatar_a8503ba1806abce46bf441b54a3ca4cd",8,"Research & Report","Miter-Aware LUT Mapping Aligning Structure and Solvability for Efficient Logic Equivalence Checking","Logic Equivalence Checking (LEC) is a core hardware verification task that often becomes a performance bottleneck due to synthesis-induced structural changes and XOR-dense regions that weaken SAT solver effectiveness. This work argues that miter modeling is as decisive as the solver itself, proposing a miter-aware LUT-based mapping framework. It aligns circuits via equivalence-preserving mapping, uses Gaussian-guided XOR modeling for algebraic simplification, and applies solver-oriented LUT selection. Experiments show up to 92.1% SAT-solver runtime reduction across state-of-the-art tools.","Miter-Aware LUT Mapping: Aligning Structure and Solvability for  \nEfficient Logic Equivalence Checking  \nJiaying Zhu 1 , Zhengyuan Shi 1 *, Mengxia Tao2 , Kezhi Li 1 , Min Li3 , Qiang Xu 1 *  \n1The Chinese University of Hong Kong, Hong Kong, China  \n2National Center of Technology Innovation for EDA, Nanjing, China  \n3 Southeast University, Nanjing, China  \n{jyzhu24,zyshi21,kzli24, [qxu}@cse.cuhk.edu.hk](qxu}@cse.cuhk.edu.hk), [taomengxia@nctieda.com](taomengxia@nctieda.com), [min.li@seu.edu.cn](min.li@seu.edu.cn)  \narXiv :2607 .07 164v 1 [ cs .AR] 8 Jul 2026  \nAbstract  \nLogic Equivalence Checking (LEC), a fundamental hardware verification task, is often bottlenecked by synthesis-induced structural perturbations and XOR-dense regions that degrade SAT solver performance. We contend that the modeling ofthe miter is as critical as the SAT solver itself. To this end, we introduce a miter-aware mapping framework that strategically formulates the problem before solving. By constructing a LUT-based miter—instead of a traditional, flat netlist—our approach preserves critical structural correspondence between the two designs while making high-level logic relations explicit. Our framework uniquely integrates three techniques: equivalence-preserving mapping to structurally align the two circuits, Gaussian-guided XOR modeling to algebraically simplify dense arithmetic, and solver-oriented LUT selection to generate a representation optimized for efficient SAT reasoning. Evaluated on comprehensive datasets, our method achieves up to a 92.1% reduction across state-of-the-art SAT solvers. This demonstrates that asolver-aware modeling paradigm, which unifies structural mapping with SAT reasoning, can fundamentally enhance LEC efficiency.  \n1 Introduction  \nLogic Equivalence Checking (LEC) [18] proves that a golden design and its implementation compute identical Boolean functions. The de facto LEC pipeline builds a miter by connecting the outputs of two designs through XOR gates and checks whether the miter can ever evaluate to 1. This turns equivalence checking into a single Boolean satisfiability (SAT) problem [6], and the approach has scaled thanks to modern SAT solvers [3, 4, 42] and solver heuristics [12, 16, 21, 35] .  \nHowever, two challenges limit the robustness of such pipeline on complex designs. First, logic synthesis (e.g. rewriting [27], resubstitution [26] and decomposition [23]) can significantly perturb logic cones and obscure matchable points between the miter’s two sides. The resulting lack of recognizable internal equivalences inhibits functional merging, a key simplification step shrinking the SAT instance within solvers [5, 41] . Second, many real-world designs contain XOR-dense modules, such as arithmetic units and cryptographic units. Unfortunately, modern SAT solvers relying on the  \n*  \nCorresponding authors: Qiang Xu and Zhengyuan Shi.  \nThis work is licensed under a Creative Commons Attribution 4 .0 International License. DAC’26, Long Beach, CA, USA  \n© 2026 Copyright held by the owner/author(s) .  \nACM ISBN 979-8-4007-2254-7/2026/07  \n[https://doi.org/10.1145/3770743.3803929](https://doi.org/10.1145/3770743.3803929)  \nsearch-backtracking algorithm [24] poorly handle constraints derived from XOR chains, deducing a literal typically requires almost all inputs fixed and terminating searching branch after verbose decisions [10, 39, 40] .  \nAlthough prior efforts attempt to simplify the SAT instances before solving [14, 33, 37], operating solely on the flattened miters remains insufficient. We attribute that LEC efficiency is determined largely by how the miter is modeled before solving. Rather than simply constructing a conventional miter and hoping the solver compensates, we advocate a modeling strategy that preserves structural correspondence and exposes strong implications prior to SAT. In this work, we propose a novel mapping-based LEC formulation that constructs a simplified Look-up Table (LUT)-based miter (see Figu","cbCaipdV41Telfkm","https://ap.wps.com/l/cbCaipdV41Telfkm","pdf",1777909,5,1,7,"English","en",105,"# Abstract\n# Introduction\n## Challenges in Conventional Miter-Based LEC\n## Proposed Miter-Aware LUT Mapping Framework\n### Equivalence-Preserving LUT Mapping\n### Gaussian-Guided XOR Modeling\n### Solver-Oriented LUT Selection\n# Experimental Results and Impact","[{\"question\":\"Why does conventional miter-based LEC often perform poorly on complex designs?\",\"answer\":\"Synthesis can perturb logic cones and hide internal correspondences needed for functional merging, while XOR-dense modules generate constraints that backtracking-driven SAT search struggles to resolve efficiently.\"},{\"question\":\"What is the core idea of the proposed miter-aware framework?\",\"answer\":\"Model the equivalence problem using a LUT-based miter that preserves structural correspondence and exposes high-level logic relations before SAT solving, rather than connecting two netlists at the bit level.\"},{\"question\":\"How do the three techniques in the framework contribute to efficiency?\",\"answer\":\"Equivalence-preserving LUT mapping aligns subgraphs, Gaussian-guided XOR modeling simplifies XOR-dense arithmetic via affine relations, and solver-oriented LUT selection chooses a representation that reduces overall SAT reasoning difficulty.\"}]",1784177436,18,{"code":4,"msg":31,"data":32},"ok",{"site_id":25,"language":24,"slug":33,"title":13,"keywords":34,"description":14,"schema_data":35,"social_meta":87,"head_meta":89,"extra_data":91,"updated_unix":28},"miter-aware-lut-mapping-aligning-structure-and-solvability-for-efficient-logic-equivalence-checking","",{"@graph":36,"@context":86},[37,54,69],{"@type":38,"itemListElement":39},"BreadcrumbList",[40,44,48,51],{"item":41,"name":42,"@type":43,"position":21},"https://docshare.wps.com","Home","ListItem",{"item":45,"name":46,"@type":43,"position":47},"https://docshare.wps.com/document/","Document",2,{"item":49,"name":12,"@type":43,"position":50},"https://docshare.wps.com/document/research-report/",3,{"item":52,"name":13,"@type":43,"position":53},"https://docshare.wps.com/document/miter-aware-lut-mapping-aligning-structure-and-solvability-for-efficient-logic-equivalence-checking/81987/",4,{"url":52,"name":13,"@type":55,"author":56,"headline":13,"publisher":58,"fileFormat":61,"inLanguage":24,"description":14,"dateModified":62,"datePublished":63,"encodingFormat":61,"isAccessibleForFree":64,"interactionStatistic":65},"DigitalDocument",{"name":9,"@type":57},"Person",{"url":41,"name":59,"@type":60},"DocShare","Organization","application/pdf","2026-07-30","2026-07-16",true,{"@type":66,"interactionType":67,"userInteractionCount":20},"InteractionCounter",{"@type":68},"ViewAction",{"@type":70,"mainEntity":71},"FAQPage",[72,78,82],{"name":73,"@type":74,"acceptedAnswer":75},"Why does conventional miter-based LEC often perform poorly on complex designs?","Question",{"text":76,"@type":77},"Synthesis can perturb logic cones and hide internal correspondences needed for functional merging, while XOR-dense modules generate constraints that backtracking-driven SAT search struggles to resolve efficiently.","Answer",{"name":79,"@type":74,"acceptedAnswer":80},"What is the core idea of the proposed miter-aware framework?",{"text":81,"@type":77},"Model the equivalence problem using a LUT-based miter that preserves structural correspondence and exposes high-level logic relations before SAT solving, rather than connecting two netlists at the bit level.",{"name":83,"@type":74,"acceptedAnswer":84},"How do the three techniques in the framework contribute to efficiency?",{"text":85,"@type":77},"Equivalence-preserving LUT mapping aligns subgraphs, Gaussian-guided XOR modeling simplifies XOR-dense arithmetic via affine relations, and solver-oriented LUT selection chooses a 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