[{"data":1,"prerenderedAt":-1},["ShallowReactive",2],{"detail-sidebar-cat-0-en-105":3,"doc-seo-203569-105":59,"doc-detail-203569-en":130},{"code":4,"msg":5,"data":6},0,"success",[7,13,18,23,28,33,38,43,48,51,55],{"id":8,"doc_module":4,"doc_module_name":9,"category_name":10,"show_sort_weight":11,"slug":12},1,"Document","Story & Novel",90,"story-novel",{"id":14,"doc_module":4,"doc_module_name":9,"category_name":15,"show_sort_weight":16,"slug":17},2,"Literature",80,"literature",{"id":19,"doc_module":4,"doc_module_name":9,"category_name":20,"show_sort_weight":21,"slug":22},4,"Exam",70,"exam",{"id":24,"doc_module":4,"doc_module_name":9,"category_name":25,"show_sort_weight":26,"slug":27},5,"Comic",60,"comic",{"id":29,"doc_module":4,"doc_module_name":9,"category_name":30,"show_sort_weight":31,"slug":32},6,"Technology",50,"technology",{"id":34,"doc_module":4,"doc_module_name":9,"category_name":35,"show_sort_weight":36,"slug":37},7,"Healthcare",40,"healthcare",{"id":39,"doc_module":4,"doc_module_name":9,"category_name":40,"show_sort_weight":41,"slug":42},8,"Research & Report",30,"research-report",{"id":44,"doc_module":4,"doc_module_name":9,"category_name":45,"show_sort_weight":46,"slug":47},9,"Religion & Spirituality",20,"religion-spirituality",{"id":46,"doc_module":4,"doc_module_name":9,"category_name":49,"show_sort_weight":46,"slug":50},"World Cup","world-cup",{"id":52,"doc_module":4,"doc_module_name":9,"category_name":53,"show_sort_weight":52,"slug":54},10,"Lifestyle","lifestyle",{"id":56,"doc_module":4,"doc_module_name":9,"category_name":57,"show_sort_weight":24,"slug":58},19,"General","general",{"code":4,"msg":60,"data":61},"ok",{"site_id":62,"language":63,"slug":64,"title":65,"keywords":66,"description":67,"schema_data":68,"social_meta":123,"head_meta":125,"extra_data":127,"updated_unix":129},105,"en","lin-basics-for-beginners-lin-bus-basics","LIN-Basics for Beginners - LIN Bus Basics","","Training material explaining LIN (Local Interconnect Network) fundamentals, including dominant low vs recessive high bus behavior, how pull-up resistors in parallel affect signal edges, and why correct pull-up dimensioning matters for EMC and UART interpretation. It describes typical LIN node hardware (microcontroller with UART and LIN transceiver), transceiver voltage/interface conversion, and key transceiver functions like timeout monitoring and slope control. Communication sections cover LIN signal patterns (wake-up, break, character), and LIN frame structure with sync, protected identifier, data bytes, and classic/enhanced checksum.",{"@graph":69,"@context":122},[70,84,105],{"@type":71,"itemListElement":72},"BreadcrumbList",[73,77,79,82],{"item":74,"name":75,"@type":76,"position":8},"https://docshare.wps.com","Home","ListItem",{"item":78,"name":9,"@type":76,"position":14},"https://docshare.wps.com/document/",{"item":80,"name":30,"@type":76,"position":81},"https://docshare.wps.com/document/technology/",3,{"item":83,"name":65,"@type":76,"position":19},"https://docshare.wps.com/document/lin-basics-for-beginners-lin-bus-basics/203569/",{"url":83,"name":65,"@type":85,"image":86,"author":91,"headline":65,"publisher":94,"fileFormat":97,"inLanguage":63,"description":67,"dateModified":98,"datePublished":99,"encodingFormat":97,"isAccessibleForFree":100,"interactionStatistic":101},"DigitalDocument",{"url":87,"@type":88,"width":89,"height":90},"https://docshare.wps.com/thumbnails/lin-basics-for-beginners-lin-bus-basics/203569.png","ImageObject",300,407,{"name":92,"@type":93},"Oliver","Person",{"url":74,"name":95,"@type":96},"DocShare","Organization","application/pdf","2026-10-19","2026-09-04",true,{"@type":102,"interactionType":103,"userInteractionCount":44},"InteractionCounter",{"@type":104},"ViewAction",{"@type":106,"mainEntity":107},"FAQPage",[108,114,118],{"name":109,"@type":110,"acceptedAnswer":111},"What are the dominant and recessive levels on a LIN bus?","Question",{"text":112,"@type":113},"The dominant level is a low level caused by at least one node closing its output switch. The recessive level is a high level that occurs only when all nodes keep their switches open.","Answer",{"name":115,"@type":110,"acceptedAnswer":116},"Why is the pull-up resistor value important in LIN signal edges?",{"text":117,"@type":113},"Pull-up behavior shapes rising edges: too steep edges can cause EMC problems, while too flat edges can lead to misinterpretation by the UART. Correctly dimensioned pull-up resistors ensure reliable timing.",{"name":119,"@type":110,"acceptedAnswer":120},"What are the three basic signal patterns transmitted on the LIN bus?",{"text":121,"@type":113},"A wake-up event (a low pulse of 250 µs up to a few ms), a break (low for at least 13 bit times followed by a high delimiter), and an asynchronous transmitted character (an 8-bit UART-style character with start and stop bits, no parity).","https://schema.org",{"og:url":83,"og:type":124,"og:title":65,"og:site_name":95,"og:description":67},"article",{"robots":126,"canonical":83},"index,follow",{"doc_id":128,"site_id":62},203569,1788561932,{"code":4,"msg":5,"data":131},{"doc_id":128,"user_id":132,"nickname":92,"user_avatar":133,"doc_module":4,"category_id":29,"category_name":30,"doc_title":65,"doc_description":67,"doc_content":134,"file_id":135,"file_url":136,"file_type":137,"file_size":138,"view_count":44,"is_deleted":4,"is_public":8,"is_downloadable":8,"audit_status":8,"page_count":139,"language":140,"language_code":63,"site_id":62,"html_lang":63,"table_of_contents":141,"faqs":142,"seo_title":143,"seo_description":67,"update_tm":129,"read_time":144},8796095461610,"https://ap-avatar.wpscdn.com/davatar_276721f389ce27ea32af1340a28f341c","LIN-Basics  \nLipowsky Industrie-Elektronik GmbH  \nLIN-bus dominant / recessive states  \nA LIN bus with one master and 3 slaves can be reduced to the simplified circuit diagram shown on the left.  \nAs soon as one of the nodes activates its output switch, the bus will have a low level, only if all output switches are open, the bus will be pulled up to its high level.  \nSince a single node is sufficient to determine the low level by closing its switch, this is called the dominant level.  \nAccordingly, the High level, for which all nodes must have their switches open, is called recessive level.  \nAll pull-up resistors are connected in parallel, so the effective pull-up resistance value corresponds to the parallel connection of all pull-up resistors.  \nThe LIN bus has only 2 states:  \nRecessive high state (all switches open)  \nDominant low state (at least 1 switch closed)  \nAll information that is transferred via the bus is coded by the chronological sequence of these two states.  \nSlide-4 30.03.2022  \nLIN-Bus Signal  \nFlanken  \nClose switch Open switch  \nFor a better understanding of the effect of the pull-up on the signal edges, the equivalent circuit diagram is supplemented by a capacitance (capacitor) .  \nThis is formed by summing up the input capacitances of all LIN nodes and the line capacitance of the LIN bus line.  \nAll pull-up resistors are connected in parallel so that the effective pull-up resistance value corresponds to the parallel connection of all pull-up resistors.  \nSince the line is actively pulled against GND when the dominant level is switched, the falling edge is correspondingly steep.  \nWhen the switches are opened, the discharged input  \ncapacitance must be reloaded to the high level via the pull-up.  \nThe higher the pullup resistance is, the flatter the rising edge becomes.  \nEdges that are too steep can lead to EMC problems and edges that are too flat can lead to misinterpretation by the UART.  \nTherefore a correctly dimensioned pull-up resistor is very important!  \nRecorded with deactivated Slope Control  \nSlide-5 30.03.2022  \nLIN Bus Hardware  \nMost LIN nodes contain the following 2 components:  \n➢ Mikrocontroller with integrated UART  \n➢ LIN-Transceiver  \nThe UART converts data bytes into asynchronous serial patterns for transmission and decodes data bytes from the received serial data stream.  \nIt also generates break and wake-up signal patterns; this can either be implemented by special LIN functions of the UART or must be implemented by sending a binary 0x0 at a different baud rate or by bit-banging the TXD port under timer control.  \nThe LIN transceiver translates the logic levels of the microcontroller (typ. 3   5V) into the LIN voltage range (8   18V) and converts the fullduplex RXD/TXD interface into a 1-wire half-duplex interface.  \n\n|  | LIN node\u003Cbr>|  |  |  |\n| --- | --- | --- | --- | --- |\n|  | \u003Cbr>TXD RXD Enable\u003Cbr>LIN Tranceiver\u003Cbr>LIN |  |  |  |\n| LIN bus |  | 8... 18V |  |  |\n\nBaby-LIN systems (Generation 2) use a NXP MC33662 LIN Transceiver  \nSlide-6 30.03.2022  \nLIN Bus Hardware  \nFurther functions of a typical LIN transceiver are  \n➢ Timeout monitoring of the dominant level  \n➢ Slope control of the signal edges  \n➢ Switch to a high speed mode to allow baud rates higher than 20 Kbit (e.g. for ECU flashing)  \n=> Disable Slope Control  \nLIN signal trace with slope control:  \n|  | LIN node\u003Cbr>|  |  |  |\n| --- | --- | --- | --- | --- |\n|  | \u003Cbr>TXD RXD Enable\u003Cbr>LIN Tranceiver\u003Cbr>LIN |  |  |  |\n| LIN bus |  | 8... 18V |  |  |\n\nSlide-7 30.03.2022  \nLIN-bus communication  \nprimitives  \n12V  \n0V  \n\n| 250us |  |\n| --- | --- |\n|  |  |\n| |  |\n| 5000us |  |\n\n12V  \n0V  \nBreak delimiter minimal 1 bittime  \nThere are 3 basic signal patterns on the LIN bus:  \n1. Wake up Event  \nLow level pulse with 250us   5 ms length Slave recognition Low pulse >= 150 us, Slave should be able to process commands 100 ms after the rising edge of the bus.  \n2. Break  \nLow level with a length of at least 13 bit times foll","cbCain61oyomq4Yg","https://ap.wps.com/l/cbCain61oyomq4Yg","pdf",4212658,118,"English","# LIN Bus Basics\n## LIN bus states and pull-up impact\n## LIN bus hardware\n## LIN bus communication primitives\n## LIN frame components\n## Protected Identifier (Protected Id)","[{\"question\":\"What are the dominant and recessive levels on a LIN bus?\",\"answer\":\"The dominant level is a low level caused by at least one node closing its output switch. The recessive level is a high level that occurs only when all nodes keep their switches open.\"},{\"question\":\"Why is the pull-up resistor value important in LIN signal edges?\",\"answer\":\"Pull-up behavior shapes rising edges: too steep edges can cause EMC problems, while too flat edges can lead to misinterpretation by the UART. Correctly dimensioned pull-up resistors ensure reliable timing.\"},{\"question\":\"What are the three basic signal patterns transmitted on the LIN bus?\",\"answer\":\"A wake-up event (a low pulse of 250 µs up to a few ms), a break (low for at least 13 bit times followed by a high delimiter), and an asynchronous transmitted character (an 8-bit UART-style character with start and stop bits, no parity).\"}]","LIN-Basics for Beginners - LIN Bus Basics | PDF",297]