[{"data":1,"prerenderedAt":-1},["ShallowReactive",2],{"doc-detail-124352-en":3,"doc-seo-124352-105":30,"detail-sidebar-cat-0-en-105":91},{"code":4,"msg":5,"data":6},0,"success",{"doc_id":7,"user_id":8,"nickname":9,"user_avatar":10,"doc_module":4,"category_id":11,"category_name":12,"doc_title":13,"doc_description":14,"doc_content":15,"file_id":16,"file_url":17,"file_type":18,"file_size":19,"view_count":4,"is_deleted":4,"is_public":20,"is_downloadable":20,"audit_status":20,"page_count":21,"language":22,"language_code":23,"site_id":24,"html_lang":23,"table_of_contents":25,"faqs":26,"seo_title":27,"seo_description":14,"update_tm":28,"read_time":29},124352,962075114101,"Seraphina","https://ap-avatar.wpscdn.com/avatar/e000253a75eb197efd?x-image-process=image/resize,m_fixed,w_180,h_180&k=1780044092746381165",8,"Research & Report","IC Modeling via Machine Learning Regressions - A Data-Driven Approach to SPICE Integration - Research Summary","The paper presents a method to generate accurate and efficient macromodels for high-speed I/O buffers, improving modular and scalable model generation through machine learning. To address limitations of traditional approaches, kernel regression is used to build SPICE-compliant models. Two term-reduction compression strategies—random selection and Nyström approximation—are compared to enhance compactness. Effectiveness is validated on real devices with signal and power integrity co-simulations, emphasizing accuracy and simulation efficiency.","POLITECNICO DI TORINO  \nRepository ISTITUZIONALE  \nIC Modeling via Machine Learning Regressions: A Data-Driven Approach to SPICE Integration  \nOriginal  \nIC Modeling via Machine Learning Regressions: A Data-Driven Approach to SPICE Integration / Atlante, Marco; Trinchero, Riccardo; Stievano, Igor S. ; Telescu, Mihai; Tanguy, Noël. -In: IEEE TRANSACTIONS ON COMPONENTS, PACKAGING AND MANUFACTURING TECHNOLOGY. PART C. MANUFACTURING. -ISSN 1083-4400. -ELETTRONICO. -15:9(2025), pp. 1814-1822. [10 . 1109/TCPMT.2025.3584470]  \nAvailability:  \nThis version is available at: 11583/3003138 since: 2025-09-18T12:52:12Z  \nPublisher: IEEE  \nPublished  \nDOI:10.1109/TCPMT.2025.3584470  \nTerms of use:  \nThis article is made available under terms and conditions as specified in the corresponding bibliographic description in the repository  \nPublisher copyright  \nIEEE postprint/Author's Accepted Manuscript  \n©2025 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collecting works, for resale or lists, or reuse of any copyrighted component of this work in other works.  \n(Article begins on next page)  \n04 October 2025  \nIC Modeling via Machine Learning Regressions: a Data-Driven Approach to SPICE Integration  \nM. Atlante , Student Member, IEEE, R. Trinchero , Member, IEEE, I. S. Stievano , Senior Member, IEEE,  \nM. Telescu , Member, IEEE, N. Tanguy   \nAbstract—This paper presents a method for generating accurate and efficient macromodels of high-speed I/O buffers. Extending existing techniques, the proposed approach enables a modular and scalable model generation tool based on machinelearning. Given the limitations of traditional methods, this work leverages kernel regression to develop SPICE-compliant models. Two compression schemes, random selection and Nystrm approximation are used and thoroughly compared to reduce the number of expansion terms, with beneficial effects in terms of compactness of the SPICE implementation. The effectiveness of the method in terms of model accuracy and efficiency is stressed through real devices and typical signal and power integrity cosimulations.  \nIndex Terms—Digital integrated circuits, buffer modeling, signal and power integrity, high-speed interconnects, machine learning, kernel regression.  \nI. INTRODUCTION  \nTHE design of modern high-performance electronic sys  \ntems is increasingly challenged by stringent performance and technological constraints, which demand more complex evaluations to ensure system reliability. Engineers must conduct comprehensive Signal and Power Integrity (SIPI) and Electromagnetic Compatibility (EMC) assessments to mitigate critical issues such as crosstalk, simultaneous switching noise, immunity, and radiation. Advanced simulation techniques are increasingly necessary to predict power bouncing and signal propagation across interconnects, considering complex geometries and nonlinear device behavior.  \nIn this framework, traditional transistor-level models based on internal physical descriptions of devices offer high accuracy, but are impractical due to their potential complexity and the resulting CPU time demand. Additionally, they risk disclosing proprietary device information or encrypted features specific to a particular SPICE solver. On the other hand, blackbox models, such as behavioral models or macromodels, offera promising and efficient alternative to transistor-level models [1] . Behavioral models infer mathematical relationships from observable responses at device ports or assume simplified circuital equivalents [2]–[11] .  \nThe most well-known example of behavioral modeling using equivalent circuits is the Input/Output Buffer Information  \nM. Atlante, R. Trinchero, and I. S. Stievano are with the EMC Group, Department of Electronics and Telecommunications, Politecnico di Torino, 10129 ","cbCais6H2plv9PN0","https://ap.wps.com/l/cbCais6H2plv9PN0","pdf",3475731,1,10,"English","en",105,"# Abstract and Index Terms\n# Introduction\n## Challenges in High-Performance System Evaluation\n## Limits of Transistor-Level and Conventional Black-Box Models\n## Behavioral Modeling and IBIS Background\n## System Identification and Machine Learning Trends\n# Kernel Regression and Compact SPICE-Compliant Macromodels","[{\"question\":\"What problem does the paper address in IC buffer modeling?\",\"answer\":\"It targets the need for accurate yet efficient macromodels of high-speed I/O buffers, where traditional transistor-level models are too complex and computationally expensive.\"},{\"question\":\"How does the proposed method ensure SPICE compatibility?\",\"answer\":\"It uses kernel regression to develop models that conform to SPICE requirements, enabling integration into standard simulation tools.\"},{\"question\":\"Which compression techniques are compared, and why?\",\"answer\":\"Random selection and Nyström approximation are compared to reduce the number of expansion terms, improving the compactness of the resulting SPICE implementation.\"}]","IC Modeling via Machine Learning Regressions - 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