[{"data":1,"prerenderedAt":-1},["ShallowReactive",2],{"doc-detail-122299-en":3,"doc-seo-122299-105":30,"detail-sidebar-cat-0-en-105":92},{"code":4,"msg":5,"data":6},0,"success",{"doc_id":7,"user_id":8,"nickname":9,"user_avatar":10,"doc_module":4,"category_id":11,"category_name":12,"doc_title":13,"doc_description":14,"doc_content":15,"file_id":16,"file_url":17,"file_type":18,"file_size":19,"view_count":20,"is_deleted":4,"is_public":20,"is_downloadable":20,"audit_status":20,"page_count":21,"language":22,"language_code":23,"site_id":24,"html_lang":23,"table_of_contents":25,"faqs":26,"seo_title":27,"seo_description":14,"update_tm":28,"read_time":29},122299,1099514067438,"River Wang","https://ap-avatar.wpscdn.com/avatar/100002539ee87300030?x-image-process=image/resize,m_fixed,w_180,h_180&k=1780474512215547542",8,"Research & Report","HIGH PERFORMANCE AND RELIABLE PROCESSING-IN-MEMORY ACCELERATORS - FOR GRAPH-BASED MACHINE LEARNING","Graph-based machine learning has become essential for solving complex tasks across social networks, recommendation systems, and biological research. These workloads rely on massive, irregular datasets that strain traditional von Neumann systems because frequent memory access and data movement create bottlenecks. Processing-in-Memory (PIM) accelerators mitigate these issues by performing computation inside memory, improving efficiency. This dissertation presents high-performance, reliable PIM accelerator designs for graph-based learning, focusing on irregular access, fault tolerance, scalability, energy efficiency, and throughput.","HIGH PERFORMANCE AND RELIABLE PROCESSING-IN-MEMORY ACCELERATORS  \nFOR GRAPH-BASED MACHINE LEARNING  \nBy  \nCHUKWUFUMNANYA OSAZEE OGBOGU  \nA dissertation submitted in partial fulfillment of  \nthe requirements for the degree of  \nDOCTOR OF PHILOSOPHY  \nWASHINGTON STATE UNIVERSITY  \nSchool of Electrical Engineering and Computer Science  \nMAY 2025  \n© Copyright by CHUKWUFUMNANYA OSAZEE OGBOGU, 2025  \nAll Rights Reserved  \n© Copyright by CHUKWUFUMNANYA OSAZEE OGBOGU, 2025  \nAll Rights Reserved  \nTo the Faculty of Washington State University:  \nThe members of the Committee appointed to examine the dissertation of CHUKWUFUMNANYA OSAZEE OGBOGU find it satisfactory and recommend that it be accepted.  \nPartha Pratim Pande, Ph.D., Chair Janardhan Rao Doppa, Ph.D., Co-Chair Dae Hyun Kim, Ph.D.  \nBiresh Kumar Joardar, Ph.D.  \nACKNOWLEDGMENT  \nAs I complete my dissertation; I would like to express my heartfelt gratitude to the individuals who have supported me throughout this journey and made this work possible.  \nFirst and foremost, I extend my deepest gratitude to my Ph.D. advisor, Professor Partha Pratim Pande, for his exceptional mentorship and unwavering support throughout my doctoral journey. His deep expertise, insightful guidance, and relentless encouragement have been invaluable in shaping my research and professional growth. Partha consistently challenged me to think critically, approach problems innovatively, and strive for excellence, all while providing thereassurance and patience needed during challenging times. His encouragement, patience, and belief in my potential have been invaluable, inspiring me to strive for excellence and approach challenges with confidence. Working under his mentorship has truly been a privilege, and the lessons I’ve learned will guide me throughout my career.  \nI would also like to express my sincere gratitude to Professor Jana Doppa (my co-advisor) for his invaluable support and guidance throughout my research journey. His expertise, thoughtful feedback, and encouragement have been instrumental in shaping this work. I am truly thankful for their mentorship and the opportunity to learn from them. I would like to thank Dr. Biresh Kumar Joardar as well for his invaluable insights and guidance, which have greatly contributed to my growth. I also appreciate my lab mates and collaborators for our insightful discussions and support throughout this journey.  \nLastly, I am deeply grateful to my wife and family for their unconditional love, support, and understanding throughout this journey. Their encouragement and belief in me have been a  \nconstant source of strength, and I could not have achieved this milestone without their unwavering  \nsupport.  \nHIGH PERFORMANCE AND RELIABLE PROCESSING-IN-MEMORY ACCELERATORS  \nFOR GRAPH-BASED MACHINE LEARNING  \nAbstract  \nby Chukwufumnanya Osazee Ogbogu, Ph.D.  \nWashington State University  \nMay 2025  \nChair: Partha Pratim Pande  \nGraph-based machine learning has emerged as a critical tool for solving complex problems in domains such as social networks, recommendation systems, and biological research. These applications require the processing of massive, irregularly structured datasets, posing significant challenges for traditional von Neumann architectures due to frequent memory access and data movement bottlenecks. Processing-in-Memory (PIM) accelerators offer a promising solution by enabling computation directly within memory, thereby reducing data movement and improving efficiency. However, achieving both high performance and reliability in PIM designs is crucial to meet the demands of graph-based workloads, which often involve diverse and dynamic computations. This dissertation explores the design of high-performance and reliable PIM accelerators tailored for graph-based machine learning, addressing challenges such as irregular data access patterns, fault tolerance, and scalability, while pushing the boundaries of energy efficiency and computational throughput. The ","cbCaiqyKdrednL7s","https://ap.wps.com/l/cbCaiqyKdrednL7s","pdf",4898452,1,174,"English","en",105,"# Acknowledgment\n# Abstract\n# List of Tables\n# List of Figures\n# Chapter One: Introduction\n# Chapter Two: Related Work\n# Chapter Three: Accelerating Large-Scale Graph Neural Network Training on a Crossbar Diet\n## 3.1 Pruning of GNNs","[{\"question\":\"Why are traditional von Neumann architectures a challenge for graph-based machine learning workloads?\",\"answer\":\"They suffer from frequent memory access and data movement, which creates bottlenecks when processing large, irregular datasets.\"},{\"question\":\"How do Processing-in-Memory (PIM) accelerators address performance issues in these workloads?\",\"answer\":\"PIM places computation within memory to reduce data movement, improving efficiency and overall processing performance.\"},{\"question\":\"What key research themes does the dissertation focus on for reliable PIM accelerator design?\",\"answer\":\"It targets high performance and reliability by addressing irregular access patterns, fault tolerance, and scalability, while aiming for strong energy efficiency and computational throughput.\"}]","HIGH PERFORMANCE AND RELIABLE PROCESSING-IN-MEMORY ACCELERATORS - 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