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It describes the hardware modules listed below for the ESP32-S3 SoC and other products in ESP32-S3 series. The modules detailed in this document provide an overview, list of features, hardware architecture details, any necessary programming procedures, as well as register descriptions.  \nNavigation in This Document  \nHere are some tips on navigation through this extensive document:  \n• Release Status at a Glance on the very next page is a minimal list of all chapters from where you can directly jump to a specific chapter.  \n• Use the Bookmarks on the side bar to jump to any specific chapters or sections from anywhere in the document. Note this PDF document is configured to automatically display Bookmarks when open, which is necessary for an extensive document like this one. However, some PDF viewers or browsers ignore this setting, so if you don’t see the Bookmarks by default, try one or more of the following methods:  \n– Install a PDF Reader Extension for your browser;  \n– Download this document, and view it with your local PDF viewer;  \n– Set your PDF viewer to always automatically display the Bookmarks on the left side bar when open.  \n• Use the native Navigation function of your PDF viewer to navigate through the documents. Most PDF viewers support to go Up , Down , Previous , Next , Back , Forward and Page with buttons, menu, or hot keys.  \n• You can also use the built-in GoBack button on the upper right corner on each and every page to go back to the previous place before you click a link within the document. Note this feature may only work with some Acrobat-specific PDF viewers (for example, Acrobat Reader and Adobe DC) and browsers with built-in Acrobat-specific PDF viewers or extensions (for example, Firefox) .  \nRelease Status at a Glance  \n\n| No. | Chapter | Progress | No. | Chapter | Progress |\n| --- | --- | --- | --- | --- | --- |\n| Part I. Microprocessor and Master |  |  | 20 | RSA Accelerator (RSA) | Published |\n| 1 | Processor Instruction Extensions (PIE) | Published | 21 | HMAC Accelerator (HMAC) | Published |\n| 2 | ULP Coprocessor (ULP-FSM, ULP-RISC-V) | Published | 22 | Digital Signature (DS) | Published |\n| 3 | GDMA Controller (GDMA) | Published | 23 | External Memory Encryption and Decryption (XTS_AES) | Published |\n| Part II. Memory Organization |  |  | 24 | Clock Glitch Detection | Published |\n| 4 | System and Memory | Published | 25 | Random Number Generator (RNG) | Published |\n| 5 | eFuse Controller (EFUSE) | Published | Part V. Connectivity Interface |  |  |\n| Part III. System Component |  |  | 26 | UART Controller (UART) | Published |\n| 6 | IO MUX and GPIO Matrix (GPIO, IOMUX) | Published | 27 | I2C Controller (I2C) | Published |\n| 7 | Reset and Clock | Published | 28 | I2S Controller (I2S) | Published |\n| 8 | Chip Boot Control | Published | 29 | LCD and Camera Controller (LCD_CAM) | Published |\n| 9 | Interrupt Matrix (INTERRUPT) | Published | 30 | SPI Controller (SPI) | Published |\n| 10 | Low-power Management (RTC_CNTL) | Published | 31 | Two-wire Automotive Interface (TWAI®) | Published |\n| 11 | System Timer (SYSTIMER) | Published | 32 | USB On-The-Go (USB) | Published |\n| 12 | Timer Group (TIMG) | Published | 33 | USB Serial/JTAG Controller (USB_SERIAL_JTAG) | Published |\n| 13 | Watchdog Timers (WDT) | Published | 34 | SD/MMC Host Controller (SDHOST) | Published |\n| 14 | XTAL32K Watchdog Timers (XTWDT) | Published | 35 | LED PWM Controller (LEDC) | Published |\n| 15 | Permission Control (PMS) | Published | 36 | Motor Control PWM (MCPWM) | Published |\n| 16 | World Controller (WCL) | Published | 37 | Remote Control Peripheral (RMT) | Published |\n| 17 | System Registers (SYSTEM) | Published | 38 | Pulse Count Controller (PCNT) | Published |\n| Part IV. Cryptog","cbCaigmnLjkXh5A0","https://ap.wps.com/l/cbCaigmnLjkXh5A0","pdf",15215232,1531,"English","# About This Document\n# Navigation in This Document\n# Release Status at a Glance\n# Contents\n## I Microprocessor and Master\n## Part II. Memory Organization\n## Part III. System Component\n## Part IV. Cryptography/Security Component\n## Part V. Connectivity Interface\n## Part VI. Analog Signal Processing","[{\"question\":\"What is the ESP32-S3 Technical Reference Manual Version 1.8 intended for?\",\"answer\":\"It is targeted at developers working on low-level software projects that use the ESP32-S3 SoC. It focuses on understanding and using the SoC’s hardware modules through detailed descriptions and register information.\"},{\"question\":\"What kinds of information are included for each hardware module?\",\"answer\":\"The manual provides an overview of features, hardware architecture details, necessary programming procedures, and register descriptions. It also covers relevant instruction and component structures where applicable.\"},{\"question\":\"How can readers navigate to specific chapters or sections within the PDF?\",\"answer\":\"Use the bookmarks sidebar, the native navigation controls of the PDF viewer, or the built-in GoBack button (for supported viewers). The document also advises downloading and viewing with a local PDF reader if bookmarks do not appear automatically.\"}]","ESP32-S3 Technical Reference Manual - Version 1.8 - Hardware modules, features, architecture, procedures, and registers | PDF",3858]