[{"data":1,"prerenderedAt":-1},["ShallowReactive",2],{"doc-seo-663586-105":3,"detail-sidebar-cat-0-en-105":80,"doc-detail-663586-en":130},{"code":4,"msg":5,"data":6},0,"ok",{"site_id":7,"language":8,"slug":9,"title":10,"keywords":11,"description":12,"schema_data":13,"social_meta":73,"head_meta":75,"extra_data":77,"updated_unix":79},105,"en","dataflow-superscalar-execution-lecture-16a-eth-zurich-spring-2020","Dataflow & Superscalar Execution - Lecture 16a - ETH Zürich Spring 2020","","Lecture 16a presents dataflow concepts and how superscalar execution engines exploit instruction-level parallelism. The agenda covers single-cycle, multi-cycle, and microprogrammed microarchitectures, pipelining issues such as control and data dependence handling plus state recovery, and out-of-order execution. It revisits restricted dataflow where an out-of-order engine builds a dataflow graph inside an instruction window, discusses the feasibility of scaling the window to the whole program, and connects the idea to Tomasulo’s algorithm while tracking RAT and reservation station state across cycles.",{"@graph":14,"@context":72},[15,34,55],{"@type":16,"itemListElement":17},"BreadcrumbList",[18,23,27,31],{"item":19,"name":20,"@type":21,"position":22},"https://docshare.wps.com","Home","ListItem",1,{"item":24,"name":25,"@type":21,"position":26},"https://docshare.wps.com/document/","Document",2,{"item":28,"name":29,"@type":21,"position":30},"https://docshare.wps.com/document/technology/","Technology",3,{"item":32,"name":10,"@type":21,"position":33},"https://docshare.wps.com/document/dataflow-superscalar-execution-lecture-16a-eth-zurich-spring-2020/663586/",4,{"url":32,"name":10,"@type":35,"image":36,"author":41,"headline":10,"publisher":44,"fileFormat":47,"inLanguage":8,"description":12,"dateModified":48,"datePublished":49,"encodingFormat":47,"isAccessibleForFree":50,"interactionStatistic":51},"DigitalDocument",{"url":37,"@type":38,"width":39,"height":40},"https://docshare.wps.com/thumbnails/dataflow-superscalar-execution-lecture-16a-eth-zurich-spring-2020/663586.png","ImageObject",300,407,{"name":42,"@type":43},"hdkawk","Person",{"url":19,"name":45,"@type":46},"DocShare","Organization","application/pdf","2026-10-30","2026-10-28",true,{"@type":52,"interactionType":53,"userInteractionCount":30},"InteractionCounter",{"@type":54},"ViewAction",{"@type":56,"mainEntity":57},"FAQPage",[58,64,68],{"name":59,"@type":60,"acceptedAnswer":61},"What does restricted dataflow mean in the context of out-of-order execution?","Question",{"text":62,"@type":63},"The out-of-order engine dynamically builds a dataflow graph for a program region. The graph is limited to the instruction window (decoded but not yet retired instructions).","Answer",{"name":65,"@type":60,"acceptedAnswer":66},"Why is the instruction window an important limitation?",{"text":67,"@type":63},"It defines the scope of the dataflow graph so that only a bounded set of decoded, non-retired instructions participate in execution ordering decisions.",{"name":69,"@type":60,"acceptedAnswer":70},"What are the main focus areas of the lecture’s pipeline discussion?",{"text":71,"@type":63},"It emphasizes how control and data dependences are handled, and how processor state is maintained and recovered during pipelined execution.","https://schema.org",{"og:url":32,"og:type":74,"og:title":10,"og:site_name":45,"og:description":12},"article",{"robots":76,"canonical":32},"index,follow",{"doc_id":78,"site_id":7},663586,1793229447,{"code":4,"msg":81,"data":82},"success",[83,87,91,95,100,104,109,114,119,122,126],{"id":22,"doc_module":4,"doc_module_name":25,"category_name":84,"show_sort_weight":85,"slug":86},"Story & Novel",90,"story-novel",{"id":26,"doc_module":4,"doc_module_name":25,"category_name":88,"show_sort_weight":89,"slug":90},"Literature",80,"literature",{"id":33,"doc_module":4,"doc_module_name":25,"category_name":92,"show_sort_weight":93,"slug":94},"Exam",70,"exam",{"id":96,"doc_module":4,"doc_module_name":25,"category_name":97,"show_sort_weight":98,"slug":99},5,"Comic",60,"comic",{"id":101,"doc_module":4,"doc_module_name":25,"category_name":29,"show_sort_weight":102,"slug":103},6,50,"technology",{"id":105,"doc_module":4,"doc_module_name":25,"category_name":106,"show_sort_weight":107,"slug":108},7,"Healthcare",40,"healthcare",{"id":110,"doc_module":4,"doc_module_name":25,"category_name":111,"show_sort_weight":112,"slug":113},8,"Research & Report",30,"research-report",{"id":115,"doc_module":4,"doc_module_name":25,"category_name":116,"show_sort_weight":117,"slug":118},9,"Religion & Spirituality",20,"religion-spirituality",{"id":117,"doc_module":4,"doc_module_name":25,"category_name":120,"show_sort_weight":117,"slug":121},"World Cup","world-cup",{"id":123,"doc_module":4,"doc_module_name":25,"category_name":124,"show_sort_weight":123,"slug":125},10,"Lifestyle","lifestyle",{"id":127,"doc_module":4,"doc_module_name":25,"category_name":128,"show_sort_weight":96,"slug":129},19,"General","general",{"code":4,"msg":81,"data":131},{"doc_id":78,"user_id":132,"nickname":42,"user_avatar":133,"doc_module":4,"category_id":101,"category_name":29,"doc_title":10,"doc_description":12,"doc_content":134,"file_id":135,"file_url":136,"file_type":137,"file_size":138,"view_count":30,"is_deleted":4,"is_public":22,"is_downloadable":22,"audit_status":22,"page_count":127,"language":139,"language_code":8,"site_id":7,"html_lang":8,"table_of_contents":140,"faqs":141,"seo_title":142,"seo_description":12,"update_tm":79,"read_time":143},3985747859855,"https://ap-avatar.wpscdn.com/davatar_276721f389ce27ea32af1340a28f341c","Digital Design & Computer Arch  \nLecture 16a: Dataflow & Superscalar Execution  \nProf. Onur Mutlu  \nETH Zürich Spring 2020  \n23 April 2020  \nRequired Readings  \nn This week  \nq Smith and Sohi,“The Microarchitecture of Superscalar Processors,” Proceedings of the IEEE, 1995  \nq H&H Chapters 7.8 and 7.9  \nq McFarling,“Combining Branch Predictors,” DEC WRL Technical Report, 1993.  \nAgenda for Today & Next Few Lectures  \nn Single-cycle Microarchitectures  \nn Multi-cycle and Microprogrammed Microarchitectures  \nn Pipelining  \nn Issues in Pipelining: Control & Data Dependence Handling, State Maintenance and Recovery,…  \nn Out-of-Order Execution  \nn Other Execution Paradigms  \nRecall: OOO Execution: Restricted Dataflow  \nn An out-of-order engine dynamically builds the dataflow graph of a piece of the program  \nn The dataflow graph is limited to the instruction window  \nq Instruction window: all decoded but not yet retired instructions  \nn Can we do it for the whole program?  \nq In other words, how can we have a large instruction window?  \nn Can we do it efficiently with Tomasulo’s algorithm?  \nRecall: State of RAT and RS in Cycle 7  \nCycle 1  \nMUL R1, R2 à R 3  \nADD R3, R4 à R 5  \nADD R2, R6 à R 7  \nADD R8, R9 à R 10  \nMUL R7, R10 à R11  \nADD R5, R11 à R5  \n\n| Register | Valid | Tag | Value |\n| --- | --- | --- | --- |\n| R1 | 1 |  | 1 |\n| R2 | 1 |  | 2 |\n| R3 | 0 | x |  |\n| R4 | 1 |  | 4 |\n| R5 | 0 | d |  |\n| R6 | 1 |  | 6 |\n| R7 | 0 | b |  |\n| R8 | 1 |  | 8 |\n| R9 | 1 |  | 9 |\n| R10 | 0 | c |  |\n| R11 | 0 | y |  |\n\nF  \n2  \nD  \nF  \n3  \nE1  \nD  \nF  \n4  \nE2  \n-  \nD  \nF  \n5  \nE3  \n-  \nE1  \nD  \nF  \n6  \nE4  \n-  \nE2  \nE1  \nD  \nF  \n7  \nE5  \n-  \nE3  \nE2  \n-  \nD  \n\n|  | Source 1 |  |  | Source 2 |  |  |\n| --- | --- | --- | --- | --- | --- | --- |\n|  | V Tag Value |  |  | V Tag Value |  |  |\n| a | 0 | x |  | 1 | ~ | 4 |\n| b | 1 | ~ | 2 | 1 | ~ | 6 |\n| c | 1 | ~ | 8 | 1 | ~ | 9 |\n| d | 0 | a |  | 0 | y |  |\n\n|  | Source 1 |  |  | Source 2 |  |  |\n| --- | --- | --- | --- | --- | --- | --- |\n|  | V Tag Value |  |  | V Tag Value |  |  |\n| x | 1 | ~ | 1 | 1 | ~ | 2 |\n| y | 0 | b |  | 0 | c |  |\n| z |  |  |  |  |  |  |\n| t |  |  |  |  |  |  |\n\nRecall: Dataflow Graph  \nOther Approaches to Concurrency (or Instruction Level Parallelism)  \nApproaches to (Instruction-Level) Concurrency  \nn Pipelining  \nn Out-of-order execution  \nn Dataflow (at the ISA level)  \nn Superscalar Execution  \nn VLIW  \nn Fine-Grained Multithreading  \nn SIMD Processing (Vector and array processors, GPUs)  \nn Decoupled Access Execute  \nn Systolic Arrays  \nReview: Data Flow:  \nExploiting Irregular Parallelism  \nData Flow Summary  \nn Availability of data determines order of execution  \nn A data flow node fires when its sources are ready  \nn Programs represented as data flow graphs (of nodes)  \nn Data Flow at the ISA level has not been (as) successful  \nn Data Flow implementations at the microarchitecture level (while preserving Von Neumann semantics) have been very successful  \nq Out of order execution is the prime example","cbCaihQbxrO3pzv9","https://ap.wps.com/l/cbCaihQbxrO3pzv9","pdf",901157,"English","# Agenda for Today & Next Few Lectures\n## Single-cycle, Multi-cycle, and Microprogrammed Microarchitectures\n## Pipelining\n## Issues in Pipelining: Control & Data Dependence, State Maintenance and Recovery\n## Out-of-Order Execution\n## Other Execution Paradigms\n# Recall: OOO Execution: Restricted Dataflow\n## Instruction Window\n## Can We Do It for the Whole Program?\n## Tomasulo’s Algorithm Connection\n# Review: Dataflow Graph and Data Flow Summary","[{\"question\":\"What does restricted dataflow mean in the context of out-of-order execution?\",\"answer\":\"The out-of-order engine dynamically builds a dataflow graph for a program region. The graph is limited to the instruction window (decoded but not yet retired instructions).\"},{\"question\":\"Why is the instruction window an important limitation?\",\"answer\":\"It defines the scope of the dataflow graph so that only a bounded set of decoded, non-retired instructions participate in execution ordering decisions.\"},{\"question\":\"What are the main focus areas of the lecture’s pipeline discussion?\",\"answer\":\"It emphasizes how control and data dependences are handled, and how processor state is maintained and recovered during pipelined execution.\"}]","Dataflow & Superscalar Execution - Lecture 16a - ETH Zürich Spring 2020 | PDF",48]