[{"data":1,"prerenderedAt":-1},["ShallowReactive",2],{"doc-detail-83812-en":3,"doc-seo-83812-105":30,"detail-sidebar-cat-0-en-105":91},{"code":4,"msg":5,"data":6},0,"success",{"doc_id":7,"user_id":8,"nickname":9,"user_avatar":10,"doc_module":4,"category_id":11,"category_name":12,"doc_title":13,"doc_description":14,"doc_content":15,"file_id":16,"file_url":17,"file_type":18,"file_size":19,"view_count":20,"is_deleted":4,"is_public":21,"is_downloadable":21,"audit_status":21,"page_count":22,"language":23,"language_code":24,"site_id":25,"html_lang":24,"table_of_contents":26,"faqs":27,"seo_title":13,"seo_description":14,"update_tm":28,"read_time":29},83812,5909877438554,"Maeve","https://ap-avatar.wpscdn.com/avatar/5600025385ad2bf12a7?_k=1778553567797529272",8,"Research & Report","Correct but Slow An Empirical Study of the GPU Kernel Evaluation Gap in Modern Domain-Specific Languages","Modern GPU domain-specific languages (DSLs) like Triton and TileLang power specialized deep-learning kernels and automated kernel-generation systems. Existing DSL-kernel evaluations validate correctness via reference-based numerical checks, but ignore replacement quality, where functionally valid kernels may still be far slower than the optimized vendor operator they target. Analyzing 22 kernels across operator categories on NVIDIA A100 and GH200, the study quantifies correctness–performance gaps, identifies root causes, and proposes lightweight screening heuristics.","Correct but Slow: An Empirical Study of the GPU Kernel Evaluation Gap in Modern Domain-Specific  \nLanguages  \nTingxi Li, Ravishka Rathnasuriya, and Wei Yang  \nThe University of Texas at Dallas  \nRichardson, TX, USA  \n{[tingxi.li](tingxi.li), ravishka.rathnasuriya, [wei.yang](wei.yang}@utdallas.edu)[}](wei.yang}@utdallas.edu)[@utdallas.edu](wei.yang}@utdallas.edu)  \narXiv :2607 .04454v2 [ cs . SE] 7 Jul 2026  \nAbstract—Modern GPU domain-specific languages (DSLs), such as Triton and TileLang, are increasingly used to implement specialized deep-learning kernels and as target languages for automated kernel-generation systems. Existing DSL-kernel evaluations establish correctness through reference-based numerical validation—necessary, but silent on replacement quality: a functionally valid kernel may still fall far below the throughput of the optimized library operator it is intended to replace.  \nWe study this correctness–performance gap using 22 Triton and TileLang kernels from five operator categories on NVIDIA A100 and GH200 GPUs, asking whether correctness-based evaluation identifies kernels unsuitable as library replacements, why such failures occur, and how they can be detected without exhaustive benchmark coverage. The study yields three results. First, correctness-based evaluation can admit severe slowdowns: an idiomatic TileLang LayerNorm kernel passes KernelBench’s correctness check while running more than 300× slower than the PyTorch baseline. Second, the causes differ by kernel family. TileLang normalization and reduction slowdowns are mainly repairable authoring defects, such as sequential reductionsand unnecessary dtype conversions, whereas convolution and large general matrix multiplication (GEMM) retain residual gaps after optimization due to code-generation and autotuningcoverage limits; vendor-library algorithm selection contributes only marginally. Third, two lightweight checks—library-relative efficiency and roofline utilization—are complementary screening criteria: together they flag every functionally valid but inefficient kernel in our suite and separate repairable authoring defects from structural residuals.  \nIndex Terms—GPU kernels, domain-specific languages, Triton, TileLang, empirical study, performance analysis  \nI. INTRODUCTION  \nDeep learning systems depend on GPU kernels that dominate execution time [1], [2] . Frameworks have historically delegated these kernels to vendor libraries such as cuBLASand cuDNN [3], [4], but modern architectures increasingly require fused, specialized, model-specific computations outside what those libraries expose [5] . Domain-specific languages (DSLs) such as Triton [6] and TileLang [7] have emerged asthe standard answer: they express kernels at the tile level and delegate memory movement, scheduling, and code generation to a compiler. Triton is already the lowering target for torch .compile [8], and DSLs are increasingly the output of large language model (LLM)-based kernel generators [9]—so whether DSL kernels can match vendor-library performance is now central to deploying them.  \nA DSL kernel measured against the vendor library may be faster, comparable, or slower by orders of magnitude, yet the measurement alone does not reveal the cause: poor authoring, a hardware ceiling already reached, or limits in the compiler’s code generation or library maturity [10] . No systematic method separates these cases, and for the fused, model-specific operators that motivate DSLs in the first place, no strong vendor baseline exists to anchor the comparison at all [11]; closing this attribution gap requires tracing performance to its cause, not just observing it.  \nExisting benchmarks do not close this gap: they admit performance-poor kernels, and their coverage across DSLs, data types, shapes, and GPUs is too narrow to certify kernel quality. KernelBench [9] and TritonBench [12], two prevailing benchmarks, report performance as an outcome but gate only on correctness. A naive but ","cbCaisbaEHTsjJNF","https://ap.wps.com/l/cbCaisbaEHTsjJNF","pdf",455629,4,1,17,"English","en",105,"# Abstract\n# Introduction\n## Problem: correctness-only evaluation\n## Limitations of existing benchmarks\n## Study approach and contributions\n# Research Questions","[{\"question\":\"Why do correctness-based DSL kernel benchmarks miss replacement-quality problems?\",\"answer\":\"They validate numerical correctness but do not measure how the kernel’s throughput compares to the vendor operator it is meant to replace, so performance-poor but functionally valid kernels can pass.\"},{\"question\":\"What hardware and kernel scope does the study use?\",\"answer\":\"It evaluates 22 Triton and TileLang kernels from five operator categories on NVIDIA A100 and GH200 GPUs, analyzing where performance gaps come from.\"},{\"question\":\"What are the main root causes of the correctness–performance gap?\",\"answer\":\"Causes differ by kernel family: some TileLang normalization/reduction slowdowns stem from repairable authoring defects, while convolution and large GEMM gaps remain after optimization due to code generation, autotuning coverage limits, and vendor-library algorithm selection that plays only a marginal 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do correctness-based DSL kernel benchmarks miss replacement-quality problems?","Question",{"text":75,"@type":76},"They validate numerical correctness but do not measure how the kernel’s throughput compares to the vendor operator it is meant to replace, so performance-poor but functionally valid kernels can pass.","Answer",{"name":78,"@type":73,"acceptedAnswer":79},"What hardware and kernel scope does the study use?",{"text":80,"@type":76},"It evaluates 22 Triton and TileLang kernels from five operator categories on NVIDIA A100 and GH200 GPUs, analyzing where performance gaps come from.",{"name":82,"@type":73,"acceptedAnswer":83},"What are the main root causes of the correctness–performance gap?",{"text":84,"@type":76},"Causes differ by kernel family: some TileLang normalization/reduction slowdowns stem from repairable authoring defects, while convolution and large GEMM gaps remain after optimization due to code generation, autotuning coverage limits, and vendor-library algorithm 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