[{"data":1,"prerenderedAt":-1},["ShallowReactive",2],{"detail-sidebar-cat-0-en-105":3,"doc-seo-183326-105":59,"doc-detail-183326-en":130},{"code":4,"msg":5,"data":6},0,"success",[7,13,18,23,28,33,38,43,48,51,55],{"id":8,"doc_module":4,"doc_module_name":9,"category_name":10,"show_sort_weight":11,"slug":12},1,"Document","Story & Novel",90,"story-novel",{"id":14,"doc_module":4,"doc_module_name":9,"category_name":15,"show_sort_weight":16,"slug":17},2,"Literature",80,"literature",{"id":19,"doc_module":4,"doc_module_name":9,"category_name":20,"show_sort_weight":21,"slug":22},4,"Exam",70,"exam",{"id":24,"doc_module":4,"doc_module_name":9,"category_name":25,"show_sort_weight":26,"slug":27},5,"Comic",60,"comic",{"id":29,"doc_module":4,"doc_module_name":9,"category_name":30,"show_sort_weight":31,"slug":32},6,"Technology",50,"technology",{"id":34,"doc_module":4,"doc_module_name":9,"category_name":35,"show_sort_weight":36,"slug":37},7,"Healthcare",40,"healthcare",{"id":39,"doc_module":4,"doc_module_name":9,"category_name":40,"show_sort_weight":41,"slug":42},8,"Research & Report",30,"research-report",{"id":44,"doc_module":4,"doc_module_name":9,"category_name":45,"show_sort_weight":46,"slug":47},9,"Religion & Spirituality",20,"religion-spirituality",{"id":46,"doc_module":4,"doc_module_name":9,"category_name":49,"show_sort_weight":46,"slug":50},"World Cup","world-cup",{"id":52,"doc_module":4,"doc_module_name":9,"category_name":53,"show_sort_weight":52,"slug":54},10,"Lifestyle","lifestyle",{"id":56,"doc_module":4,"doc_module_name":9,"category_name":57,"show_sort_weight":24,"slug":58},19,"General","general",{"code":4,"msg":60,"data":61},"ok",{"site_id":62,"language":63,"slug":64,"title":65,"keywords":66,"description":67,"schema_data":68,"social_meta":123,"head_meta":125,"extra_data":127,"updated_unix":129},105,"en","cmos-metal-replacement-gate-transistors-using-tantalum-pentoxide-gate-insulator","CMOS Metal Replacement Gate Transistors using Tantalum Pentoxide Gate Insulator","","This paper reports a full CMOS process combining a TiN/W metal replacement gate with a high-k tantalum pentoxide gate insulator over thin remote plasma nitrided gate oxide. MOS devices achieve high gate capacitances equivalent to those expected for sub-2 nm SiO2, while maintaining relatively low gate leakage. Transistors with gate lengths near or below 0.1 μm show good electrical characteristics, and first demonstrations of working CMOS circuits using Ta2O5 gate insulation are presented.",{"@graph":69,"@context":122},[70,84,105],{"@type":71,"itemListElement":72},"BreadcrumbList",[73,77,79,82],{"item":74,"name":75,"@type":76,"position":8},"https://docshare.wps.com","Home","ListItem",{"item":78,"name":9,"@type":76,"position":14},"https://docshare.wps.com/document/",{"item":80,"name":40,"@type":76,"position":81},"https://docshare.wps.com/document/research-report/",3,{"item":83,"name":65,"@type":76,"position":19},"https://docshare.wps.com/document/cmos-metal-replacement-gate-transistors-using-tantalum-pentoxide-gate-insulator/183326/",{"url":83,"name":65,"@type":85,"image":86,"author":91,"headline":65,"publisher":94,"fileFormat":97,"inLanguage":63,"description":67,"dateModified":98,"datePublished":99,"encodingFormat":97,"isAccessibleForFree":100,"interactionStatistic":101},"DigitalDocument",{"url":87,"@type":88,"width":89,"height":90},"https://docshare.wps.com/thumbnails/cmos-metal-replacement-gate-transistors-using-tantalum-pentoxide-gate-insulator/183326.png","ImageObject",300,407,{"name":92,"@type":93},"Aurelia","Person",{"url":74,"name":95,"@type":96},"DocShare","Organization","application/pdf","2026-10-29","2026-09-02",true,{"@type":102,"interactionType":103,"userInteractionCount":52},"InteractionCounter",{"@type":104},"ViewAction",{"@type":106,"mainEntity":107},"FAQPage",[108,114,118],{"name":109,"@type":110,"acceptedAnswer":111},"What gate insulator structure is used in this CMOS process?","Question",{"text":112,"@type":113},"The process uses tantalum pentoxide (Ta2O5) as the high dielectric constant gate insulator, stacked over thin remote plasma nitrided gate oxide in a TiN/W metal replacement gate scheme.","Answer",{"name":115,"@type":110,"acceptedAnswer":116},"Why is the replacement gate approach important for device fabrication?",{"text":117,"@type":113},"It allows the source/drain implant anneal to occur before forming the gate insulator, enabling higher anneal temperatures without degrading Ta2O5 properties or excessively growing interfacial oxide.",{"name":119,"@type":110,"acceptedAnswer":120},"What device characteristics are reported for Ta2O5-gated MOS transistors?",{"text":121,"@type":113},"MOS devices show high gate capacitance comparable to sub-2 nm SiO2 equivalents with relatively low gate leakage, and transistors with gate lengths near or below 0.1 μm exhibit good performance; working CMOS circuits are demonstrated.","https://schema.org",{"og:url":83,"og:type":124,"og:title":65,"og:site_name":95,"og:description":67},"article",{"robots":126,"canonical":83},"index,follow",{"doc_id":128,"site_id":62},183326,1788352190,{"code":4,"msg":5,"data":131},{"doc_id":128,"user_id":132,"nickname":92,"user_avatar":133,"doc_module":4,"category_id":39,"category_name":40,"doc_title":65,"doc_description":67,"doc_content":134,"file_id":135,"file_url":136,"file_type":137,"file_size":138,"view_count":52,"is_deleted":4,"is_public":8,"is_downloadable":8,"audit_status":8,"page_count":19,"language":139,"language_code":63,"site_id":62,"html_lang":63,"table_of_contents":140,"faqs":141,"seo_title":142,"seo_description":67,"update_tm":129,"read_time":52,"preview_page_count":4},1099514068365,"https://ap-avatar.wpscdn.com/avatar/10000253d8d9f28188e?_k=1776742907772140068","# CMOS Metal Replacement Gate Transistors usingTantalum Pentoxide Gate Insulator\n\nA.Chatterjee,R.A.Chapman,K.Joyner,M.Otobe*,S.Hattangady,M.Bevan,G.A.Brown,H.Yang,Q.He,D.Rogers,S.J.Fang,R.Kraft,A.L.P.Rotondaro,M.Terry,K.Brennan,S.-W.Aur,J.C.Hu,H-L Tsai,P.Jones,G.Wilk,M.Aoki*,M.Rodder,and I.-C.Chen  \nSilicon Technology Development,MS 3702 Texas Instruments,P.O.Box 650311,Dallas TX 75265.*Tsukuba Research and Development Center,Texas Instruments,Japan  \n## Abstract\n\nThis paper reports a full CMOS process using acombination of a TiN/W Metal Replacement Gate Transistordesign with a high dielectric constant gate insulator oftantalum pentoxide over thin remote plasma nitrided gateoxide.MOS devices with high gate capacitances equivalentto that for\u003C2nm SiO₂but having relatively low gate leakageare reported.Transistors with gate lengths near or below 0.1μm have good characteristics.Working CMOS circuits usingTa₂Os gate insulator are demonstrated for the first time.  \n## 1.Introduction\n\nTantalum pentoxide gate insulator has been applied to 3μm Al gate NMOS[1],to 0.35μm CMOS using WSi/n+polygate [2],and to 0.35 μm NMOS using TiN gate [3].TheReplacement Gate design [4]has the unique advantage thatthe anneal of the source/drain implants is performed beforethe gate insulator is formed.Thus,here a high annealemperature of 1000 ℃ can be used to fully activate thesource/drain implants.In conventional designs[1]-[3]theS/D anneal temperature must be limited to 800℃ to preventdegradation of the properties of the tantalum pentoxide orfurther growth of the interfacial oxide that would result in areduction of effective capacitance.  \n## 2.Fabrication\n\nFigure 1 explains the Replacement Gate process asapplied to the use of Ta₂O₅gate insulator.First,standardpoly-Si gate transistors are built using a twin well CMOSprocess with STI isolation.The poly-Si gate and SiO₂gateinsulator are then replaced by an SiO₂/Ta₂O₅/TiN/Winsulator/metal-gate stack.Figure 2 shows a cross sectionalTEM of a transistor with approximately 0.1 μm gate length.A layered PVD/CVD/PVD TiN film is used unlike the singleCVD TiN film used for the NMOS transistors described in[4].The multi-layered TiN film enables us to utilize thesuperior electrical qualities of the PVD TiN film [5]withoutcausing any discontinuities along the sides of the gate slot.The conformal CVD TiN film ensures continuity along thesides of the slot.The poor conformality of the PVD TiNdeposit causes a narrowing of the top of the gate slot.TheTEM image shows that despite the breadloafing of the PVDTiN the CVDW forms a continuous layer over TiN film.  \nFigure 3 shows a high resolution TEM of the gate andchannel interface for a transistor with 0.1μm gate length.For  \n29.1.1  \n0-7803-4774-9/98/$10.0001998 IEEE  \nthisthis sample,the Ta₂O₅thickness is estimated to be about 5.5  \nnm.Note that it is difficult to obtain this thickness verynm.  \naccurately because the Ta₂O₅/TiN interface is not veryaccu  \ndistinct in the TEM image.The interfacial SiOxNy is 2 nmdisti  \nthick in the TEM as measured using the Si lattice fringes forthic  \ncalibration.Before nitridation by Remote Plasma Nitridationcalib  \n(RPN)the SiO₂was 1.5 nm thick measured by ellipsometry.(RP  \nIt isIt is not clear whether the 0.5 nm increase in thickness can beattriattributed solely to the Ta₂Os anneal or whether some of theobseobserved increase is due to the RPN process or even simplyan aan artifact of estimating the position of the interfaces from aTEMTEM image.  \nThe disposable poly-Si gate is formed using DUVlitholithography and a linewidth reduction etch to obtain sub-0.1μm μm linewidths [6].Figure 4 shows that the linewidthredureduction is~0.05 μm.Continuous poly-Si linewidths areobtaobtained down to 0.05 μm linewidths.The linewidth Lgate ofthe rthe replacement metal gate MOSFET at bottom of the grooveis deis decreased by the thickness of the Ta₂Os film deposited oneacheach side of the slot,as illustrated in Fig.1 c),d),and e).  \n## 3.Results\n\nDevices w","cbCaimdlDSDISl94","https://ap.wps.com/l/cbCaimdlDSDISl94","pdf",1211912,"English","# Abstract\n# 1. Introduction\n# 2. Fabrication\n# 3. Results","[{\"question\":\"What gate insulator structure is used in this CMOS process?\",\"answer\":\"The process uses tantalum pentoxide (Ta2O5) as the high dielectric constant gate insulator, stacked over thin remote plasma nitrided gate oxide in a TiN/W metal replacement gate scheme.\"},{\"question\":\"Why is the replacement gate approach important for device fabrication?\",\"answer\":\"It allows the source/drain implant anneal to occur before forming the gate insulator, enabling higher anneal temperatures without degrading Ta2O5 properties or excessively growing interfacial oxide.\"},{\"question\":\"What device characteristics are reported for Ta2O5-gated MOS transistors?\",\"answer\":\"MOS devices show high gate capacitance comparable to sub-2 nm SiO2 equivalents with relatively low gate leakage, and transistors with gate lengths near or below 0.1 μm exhibit good performance; working CMOS circuits are demonstrated.\"}]","CMOS Metal Replacement Gate Transistors using Tantalum Pentoxide Gate Insulator | PDF"]