[{"data":1,"prerenderedAt":-1},["ShallowReactive",2],{"doc-detail-127668-en":3,"doc-seo-127668-105":30,"detail-sidebar-cat-0-en-105":95},{"code":4,"msg":5,"data":6},0,"success",{"doc_id":7,"user_id":8,"nickname":9,"user_avatar":10,"doc_module":4,"category_id":11,"category_name":12,"doc_title":13,"doc_description":14,"doc_content":15,"file_id":16,"file_url":17,"file_type":18,"file_size":19,"view_count":4,"is_deleted":4,"is_public":20,"is_downloadable":20,"audit_status":20,"page_count":21,"language":22,"language_code":23,"site_id":24,"html_lang":23,"table_of_contents":25,"faqs":26,"seo_title":27,"seo_description":14,"update_tm":28,"read_time":29},127668,962084925636,"Olivia Brown","https://ap-avatar.wpscdn.com/davatar_994ba38a5ba835b3df7d355c54d3ed8d",8,"Research & Report","BB-ML: Basic Block Performance Prediction using Machine Learning Techniques","Machine Learning (ML) techniques are applied to performance prediction for large-scale GPU applications at a finer granularity than coarse approaches, targeting Basic Block (BB) execution behavior. The method extrapolates basic block execution counts using a Poisson Neural Network (PNN) trained on both random inputs and the smallest application inputs, learning the mapping from input values to BB counts. Experiments on 16 GPU benchmarks show 93.5% accuracy for extrapolation to large inputs and 97.7% accuracy on random instances. A CUDA case study evaluates global and shared memory requests plus tensor core, ALU, FMA, and FP64 active cycles, reporting low average error and bounded worst-case error across units.","arXiv :2202 .07798v3 [ cs .LG] 12 Nov 2023  \nBB-ML: Basic Block Performance Prediction using Machine Learning Techniques  \nHamdy Abdelkhalik∗ , Shamminuj Aktar∗ , Yehia Arafa∗ ,†, Atanu Barai∗ ,§ , Gopinath Chennupati¶ , Nandakishore Santhi‡, Nishant Panda‡, Nirmal Prajapati‡, Nazmul Haque Turja∗ ,§ , Stephan Eidenbenz‡, Abdel-Hameed Badawy∗ ,‡  \n∗ Klipsch School of ECE, New Mexico State University, Las Cruces, NM 80003, USA  \n‡Los Alamos National Laboratory, Los Alamos, NM 87545, USA  \n†Qualcomm Inc, USA § Intel Corporation, USA ¶ Amazon Inc, USA  \n{enghamdy, saktar, yarafa, atanu, nhturja, [badawy](badawy}@nmsu.edu {nsanthi)[}](badawy}@nmsu.edu {nsanthi)[@nmsu.edu](badawy}@nmsu.edu {nsanthi)[ {](badawy}@nmsu.edu {nsanthi)[nsanthi](badawy}@nmsu.edu {nsanthi), nishpan, prajapati, [eidenben](eidenben}@lanl.gov)[}](eidenben}@lanl.gov)[@lanl.gov](eidenben}@lanl.gov)  \nAbstract  \nRecent years have seen the adoption of Machine Learning (ML) techniques to predict the performance of largescale applications, mostly at a coarse level. In contrast, we propose to use ML techniques for performance prediction at a much finer granularity, namely at the Basic Block (BB) level, which are single entry, single exit code blocks that are used for analysis by the compilers to break down a large code into manageable pieces. We extrapolate the basic block execution counts of GPU applications and use them for predicting the performance for large input sizes from the counts of smaller input sizes. In this work, we train a Poisson Neural Network (PNN) model using random input values as well as the lowest input values of the application to learn the relationship between inputs and basic block counts. Experimental results show that the model can accurately predict the basic block execution counts of  \n16 GPU benchmarks. We achieve an accuracy of 93 .5% in extrapolating the basic block counts for large input sets when trained on smaller input sets and an accuracy of 97 .7% in predicting basic block counts on random instances.  \nIn a case study, we apply the ML model to CUDA GPU benchmarks for performance prediction across a spectrum of applications. We use a variety of metrics for evaluation, including global memory requests and the active cycles of tensor cores, ALU, and FMA units. Results demonstrate the model’s capability of predicting the performance of large datasets with an average error rate of 0.85% and 0.17% for global and shared memory requests, respectively.  \nAdditionally, to address the utilization of the main functional units in Ampere architecture GPUs, we calculate the active cycles for tensor cores, ALU, FMA, and FP64 units and achieve an average error of 2.3% and 10.66% for ALU and FMA units while the maximum observed error across all tested applications and units reaches 18 .5% .  \nKeywords: Performance Modeling, Basic Block, GPGPU Application, Machine Learning  \n1 Introduction  \nGraphics Processing Units (GPUs) have rapidly advanced to become the most common accelerators for high-performance computing. Modern GPUs are equipped with thousands of processors, capable of reaching up to 9.7 TFLOPS (trillion floating-point operations per second) for mixed-precision tasks [2] . Their highly parallel structure, exceptional floating-point computation capabilities, and memory parallelism make them ideal for a range of scientific and engineering applications in High-Performance Computing (HPC) environments. The most recent TOP500 list shows that the newest generation of supercomputers predominantly features GPU-accelerated systems [7] . This widespread adoption has sparked considerable research into the performance modeling and simulation of modern GPUs.  \nModeling and simulation tools play a significant role in designing and evaluating new hardware features and understanding the limiting factors on application performance. Due to modern GPU complexity, improving its hardware performance has become more complex. Using ModSim(Modeling and Simulati","cbCaiifMjKX6iiNM","https://ap.wps.com/l/cbCaiifMjKX6iiNM","pdf",1349068,1,12,"English","en",105,"# Abstract\n# 1 Introduction\n## GPU performance modeling and simulation\n## Basic block granularity for prediction\n## Motivation for BB count extrapolation","[{\"question\":\"What is the core idea of BB-ML for performance prediction?\",\"answer\":\"BB-ML predicts performance at the Basic Block (BB) level by learning relationships between input values and BB execution counts, then extrapolating counts to larger inputs.\"},{\"question\":\"How is the Poisson Neural Network (PNN) trained in this work?\",\"answer\":\"The model is trained using random input values as well as the lowest input values of the application to learn the connection between inputs and basic block counts.\"},{\"question\":\"What evaluation results are reported for extrapolating BB execution counts?\",\"answer\":\"On 16 GPU benchmarks, the model achieves 93.5% accuracy when extrapolating BB counts for large input sets and 97.7% accuracy on random instances.\"},{\"question\":\"Which metrics are used in the CUDA case study for performance evaluation?\",\"answer\":\"The study uses metrics such as global memory requests and active cycles of tensor cores, ALU, and FMA units, and also computes active cycles for additional units on Ampere architecture GPUs.\"}]","BB-ML: Basic Block Performance Prediction using Machine Learning Techniques | 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is the core idea of BB-ML for performance prediction?","Question",{"text":75,"@type":76},"BB-ML predicts performance at the Basic Block (BB) level by learning relationships between input values and BB execution counts, then extrapolating counts to larger inputs.","Answer",{"name":78,"@type":73,"acceptedAnswer":79},"How is the Poisson Neural Network (PNN) trained in this work?",{"text":80,"@type":76},"The model is trained using random input values as well as the lowest input values of the application to learn the connection between inputs and basic block counts.",{"name":82,"@type":73,"acceptedAnswer":83},"What evaluation results are reported for extrapolating BB execution counts?",{"text":84,"@type":76},"On 16 GPU benchmarks, the model achieves 93.5% accuracy when extrapolating BB counts for large input sets and 97.7% accuracy on random instances.",{"name":86,"@type":73,"acceptedAnswer":87},"Which metrics are used in the CUDA case study for performance evaluation?",{"text":88,"@type":76},"The study uses metrics such as global memory requests and active cycles of tensor cores, ALU, and FMA units, and also computes active cycles for additional units on Ampere architecture GPUs.","https://schema.org",{"og:url":52,"og:type":91,"og:title":13,"og:site_name":59,"og:description":14},"article",{"robots":93,"canonical":52},"index,follow",{"doc_id":7,"site_id":24},{"code":4,"msg":5,"data":96},[97,101,105,109,114,119,124,126,131,134,138],{"id":20,"doc_module":4,"doc_module_name":46,"category_name":98,"show_sort_weight":99,"slug":100},"Story & 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