[{"data":1,"prerenderedAt":-1},["ShallowReactive",2],{"doc-detail-121908-en":3,"doc-seo-121908-105":30,"detail-sidebar-cat-0-en-105":91},{"code":4,"msg":5,"data":6},0,"success",{"doc_id":7,"user_id":8,"nickname":9,"user_avatar":10,"doc_module":4,"category_id":11,"category_name":12,"doc_title":13,"doc_description":14,"doc_content":15,"file_id":16,"file_url":17,"file_type":18,"file_size":19,"view_count":20,"is_deleted":4,"is_public":20,"is_downloadable":20,"audit_status":20,"page_count":21,"language":22,"language_code":23,"site_id":24,"html_lang":23,"table_of_contents":25,"faqs":26,"seo_title":27,"seo_description":14,"update_tm":28,"read_time":29},121908,549758252649,"Ivy","https://ap-avatar.wpscdn.com/avatar/8000253669c5317157?_k=1778319167496531819",8,"Research & Report","Applying Machine Learning Models on Metrology Data for Predicting Device Electrical Performance","Moore’s Law drives ever-smaller transistor nodes, while printed pattern quality increasingly hinges on overlay accuracy. Overlay errors can trigger fatal IC failures such as shorts or broken connections, making overlay analysis and control essential. This work uses an imec N-14 BEOL LELE patterning flow to print metal layers and focuses on fork-fork decomposition into two masks, where M1A–M1B overlay control is critical. Scatterometry spectra and CD/overlay measurements at multiple wafer steps feed machine learning models to quantify overlay’s impact on capacitance and predict final electrical performance early.","arXiv :2312 .09462v1 [ ee ss . SP] 20 Nov 2023  \nApplying Machine Learning Models on Metrology Data for Predicting Device Electrical  \nPerformance  \nBappaditya Dey 1 *, Anh Tuan Ngo2 *, Sara Sacchi 1 ,3 *, Victor Blanco 1 , Philippe  \nLeray 1 , and Sandip Halder 1  \n1 imec, Kapeldreef 75, 3001 Leuven, Belgium  \n2 School of Engineering and Physical Sciences, Henriot-Watt University, Edinburgh (UK)  \n3 Department of Physics and Astronomy, University of Bologna, Italy  \n* Bappaditya Dey, Anh Tuan Ngo and Sara Sacchi contributed equally to the work.  \nAbstract. Moore’s Law states that transistor density will double every two years, which is sustained until today due to continuous multidirectional innovations (such as extreme ultraviolet lithography, novel patterning techniques etc.), leading the semiconductor industry towards 3 nm node (N3) and beyond. For any patterning scheme, the most important metric to evaluate the quality of printed patterns is edge placement error, with overlay being its largest contribution. Overlay errors can lead to fatal failures of IC devices such as short circuits or broken connections in terms of pattern-to-pattern electrical contacts. Therefore, it is essential to develop effective overlay analysis and control techniques to ensure good functionality of fabricated semiconductor devices. In this work we have used an imec N-14 BEOL process flow using litho-etch-litho-etch (LELE) patterning technique to print metal layers with minimum pitch of 48nm with 193i lithography. Fork-fork structures are decomposed into two mask layers (M1A and M1B) and then the LELE flow is carried out to make the final patterns. Since a single M1 layer is decomposed into two masks, control of overlay between the two masks is critical. The goal of this work is of two-fold as, (1) to quantify the impact of overlay on capacitance and (2) to see if we can predict the final capacitance measurements with selected machine learning models at an early stage. Todo so, scatterometry spectra are collected on these electrical test structures at (a) post litho, (b) post TiN hardmask etch, and (c) post Cu plating and CMP. Critical Dimension (CD) and overlay measurements for line/space (L/S) pattern are done with SEM post litho, post etch and post Cu CMP. Various machine learning models are applied to do the capacitance prediction with multiple metrology inputs at different steps of wafer processing. Finally, we demonstrate that by using appropriate machine learning models we are able to do better prediction of electrical results.  \nKeywords: on-device overlay · scatterometry · interconnect · Back-EndOf-Line (BEOL) · lithography · critical dimension (CD) · edge placement error (EPE) · machine learning · predictive metrology.  \n2 Authors Suppressed Due to Excessive Length  \n1 Introduction  \nThe long standing IC industry push for device shrink, increased drive current and lower operating voltages often results in complex 3D device architectures. The inspection of 3D architectures imposes more challenges and demands in increased importance of metrology [1] . During R&D phase, different metrology techniques are used for exploratory process development, while, during high volume manufacturing, metrology is focused on process control. Techniques like scatterometry and CD-SEM (Critical Dimension Scanning Electron Microscope) are typically used for in-line CD measurements. However, both techniques have certain limitations and advantages. For instance, inconsistency in material properties (n&k) and long model-optimization times restrict scatterometry techniques, while resist shrinkage and its charging effect impact the measurement performance of the CD-SEM tool [2] . As advanced patterning techniques involve fabricating the device in multiple steps of different layers, critical dimensions and overlay are crucial to be monitored and controlled. Overlay can be defined as the relative alignment of consecutive masked layers within the device [3] . Fig. 1 ","cbCaicjTVTExvmqu","https://ap.wps.com/l/cbCaicjTVTExvmqu","pdf",2539300,1,19,"English","en",105,"# Abstract\n## Semiconductor background and motivation\n## Experiment design and metrology data collection\n## Machine learning-based capacitance prediction\n## Impact and results","[{\"question\":\"Why is overlay accuracy critical in advanced semiconductor patterning?\",\"answer\":\"Overlay is the relative alignment of consecutive masked layers. When overlay errors exceed an allowed budget, defects can cause shorts, line breaks, or bad contacts, leading to device failure.\"},{\"question\":\"What measurement data are used for the machine learning prediction in this study?\",\"answer\":\"Scatterometry spectra are collected at post litho, post TiN hardmask etch, and post Cu plating/CMP, and CD and overlay for line/space patterns are measured with SEM after corresponding steps.\"},{\"question\":\"What are the two main goals of applying machine learning in this work?\",\"answer\":\"The study aims to (1) quantify how overlay affects capacitance and (2) predict final capacitance measurements using selected machine learning models at an early stage of wafer processing.\"}]","Applying Machine Learning Models on Metrology Data for Predicting Device Electrical Performance | PDF",1785807674,48,{"code":4,"msg":31,"data":32},"ok",{"site_id":24,"language":23,"slug":33,"title":13,"keywords":34,"description":14,"schema_data":35,"social_meta":86,"head_meta":88,"extra_data":90,"updated_unix":28},"applying-machine-learning-models-on-metrology-data-for-predicting-device-electrical-performance","",{"@graph":36,"@context":85},[37,54,68],{"@type":38,"itemListElement":39},"BreadcrumbList",[40,44,48,51],{"item":41,"name":42,"@type":43,"position":20},"https://docshare.wps.com","Home","ListItem",{"item":45,"name":46,"@type":43,"position":47},"https://docshare.wps.com/document/","Document",2,{"item":49,"name":12,"@type":43,"position":50},"https://docshare.wps.com/document/research-report/",3,{"item":52,"name":13,"@type":43,"position":53},"https://docshare.wps.com/document/applying-machine-learning-models-on-metrology-data-for-predicting-device-electrical-performance/121908/",4,{"url":52,"name":13,"@type":55,"author":56,"headline":13,"publisher":58,"fileFormat":61,"inLanguage":23,"description":14,"dateModified":62,"datePublished":62,"encodingFormat":61,"isAccessibleForFree":63,"interactionStatistic":64},"DigitalDocument",{"name":9,"@type":57},"Person",{"url":41,"name":59,"@type":60},"DocShare","Organization","application/pdf","2026-08-04",true,{"@type":65,"interactionType":66,"userInteractionCount":20},"InteractionCounter",{"@type":67},"ViewAction",{"@type":69,"mainEntity":70},"FAQPage",[71,77,81],{"name":72,"@type":73,"acceptedAnswer":74},"Why is overlay accuracy critical in advanced semiconductor patterning?","Question",{"text":75,"@type":76},"Overlay is the relative alignment of consecutive masked layers. When overlay errors exceed an allowed budget, defects can cause shorts, line breaks, or bad contacts, leading to device failure.","Answer",{"name":78,"@type":73,"acceptedAnswer":79},"What measurement data are used for the machine learning prediction in this study?",{"text":80,"@type":76},"Scatterometry spectra are collected at post litho, post TiN hardmask etch, and post Cu plating/CMP, and CD and overlay for line/space patterns are measured with SEM after corresponding steps.",{"name":82,"@type":73,"acceptedAnswer":83},"What are the two main goals of applying machine learning in this work?",{"text":84,"@type":76},"The study aims to (1) quantify how overlay affects capacitance and (2) predict final capacitance measurements using selected machine learning models at an early stage of wafer processing.","https://schema.org",{"og:url":52,"og:type":87,"og:title":13,"og:site_name":59,"og:description":14},"article",{"robots":89,"canonical":52},"index,follow",{"doc_id":7,"site_id":24},{"code":4,"msg":5,"data":92},[93,97,101,105,110,115,120,123,128,131,135],{"id":20,"doc_module":4,"doc_module_name":46,"category_name":94,"show_sort_weight":95,"slug":96},"Story & Novel",90,"story-novel",{"id":47,"doc_module":4,"doc_module_name":46,"category_name":98,"show_sort_weight":99,"slug":100},"Literature",80,"literature",{"id":53,"doc_module":4,"doc_module_name":46,"category_name":102,"show_sort_weight":103,"slug":104},"Exam",70,"exam",{"id":106,"doc_module":4,"doc_module_name":46,"category_name":107,"show_sort_weight":108,"slug":109},5,"Comic",60,"comic",{"id":111,"doc_module":4,"doc_module_name":46,"category_name":112,"show_sort_weight":113,"slug":114},6,"Technology",50,"technology",{"id":116,"doc_module":4,"doc_module_name":46,"category_name":117,"show_sort_weight":118,"slug":119},7,"Healthcare",40,"healthcare",{"id":11,"doc_module":4,"doc_module_name":46,"category_name":12,"show_sort_weight":121,"slug":122},30,"research-report",{"id":124,"doc_module":4,"doc_module_name":46,"category_name":125,"show_sort_weight":126,"slug":127},9,"Religion & Spirituality",20,"religion-spirituality",{"id":126,"doc_module":4,"doc_module_name":46,"category_name":129,"show_sort_weight":126,"slug":130},"World Cup","world-cup",{"id":132,"doc_module":4,"doc_module_name":46,"category_name":133,"show_sort_weight":132,"slug":134},10,"Lifestyle","lifestyle",{"id":21,"doc_module":4,"doc_module_name":46,"category_name":136,"show_sort_weight":106,"slug":137},"General","general"]